Interconnect-Aware Coherence Protocols for Chip Multiprocessors

Interconnect-Aware Coherence Protocols for Chip Multiprocessors

ACM SIGARCH Computer Architecture News ◽

10.1145/1150019.1136515 ◽

2006 ◽

Vol 34 (2) ◽

pp. 339-351 ◽

Cited By ~ 24

Author(s):

Liqun Cheng ◽

Naveen Muralimanohar ◽

Karthik Ramani ◽

Rajeev Balasubramonian ◽

John B. Carter

Keyword(s):

Chip Multiprocessors ◽

2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT) ◽

Characterizing soft error vulnerability of cache coherence protocols for chip-multiprocessors

10.1109/dft.2014.6962071 ◽

2014 ◽

Author(s):

Chuanlei Zheng ◽

Shuai Wang

Keyword(s):

Chip Multiprocessors ◽

Cache Coherence ◽

Soft Error ◽

Architectural Implications of Cache Coherence Protocols with Network Applications on Chip MultiProcessors

Lecture Notes in Computer Science - Network and Parallel Computing ◽

10.1007/978-3-540-74784-0_40 ◽

2007 ◽

pp. 394-403

Author(s):

Kyueun Yi ◽

Jean-Luc Gaudiot

Keyword(s):

Chip Multiprocessors ◽

Cache Coherence ◽

Network Applications ◽

Coherence Protocols ◽

On Chip

Energy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation

2011 International Conference on Parallel Processing ◽

10.1109/icpp.2011.44 ◽

2011 ◽

Cited By ~ 5

Author(s):

Antonio Garcia-Guirado ◽

Ricardo Fern´ndez-Pascual ◽

Alberto Ros ◽

Jose M. Garcia

Keyword(s):

Energy Efficient ◽

Chip Multiprocessors ◽

Cache Coherence ◽

Server Consolidation ◽

Algorithms for Categorizing Multiprocessor Communication Under Invalidate and Update-Based Coherence Protocols.

10.21236/ada290022 ◽

1994 ◽

Cited By ~ 2

Author(s):

Ricardo Bianchini ◽

Leonidas Kontothanassis

Keyword(s):

A study on optimally co-scheduling jobs of different lengths on chip multiprocessors

Proceedings of the 6th ACM conference on Computing frontiers - CF '09 ◽

10.1145/1531743.1531752 ◽

2009 ◽

Cited By ~ 23

Author(s):

Kai Tian ◽

Yunlian Jiang ◽

Xipeng Shen

Keyword(s):

Chip Multiprocessors ◽

On Chip

Fast synchronization for chip multiprocessors

ACM SIGARCH Computer Architecture News ◽

10.1145/1105734.1105743 ◽

2005 ◽

Vol 33 (4) ◽

pp. 64-69 ◽

Cited By ~ 8

Author(s):

Jack Sampson ◽

Rubén González ◽

Jean-Francois Collard ◽

Norman P. Jouppi ◽

Mike Schlansker

Keyword(s):

Chip Multiprocessors

Embedded RAIDs-on-chip for bus-based chip-multiprocessors

ACM Transactions on Embedded Computing Systems ◽

10.1145/2533316 ◽

2014 ◽

Vol 13 (4) ◽

pp. 1-36 ◽

Cited By ~ 2

Author(s):

Luis Angel D. Bathen ◽

Nikil D. Dutt

Keyword(s):

Chip Multiprocessors ◽

On Chip

Task and Communication Allocation for Real-time Tasks to Networks-on-Chip Multiprocessors

2020 Second International Conference on Embedded & Distributed Systems (EDiS) ◽

10.1109/edis49545.2020.9296446 ◽

2020 ◽

Author(s):

Chawki Benchehida ◽

Mohammed Kamel Benhaoua ◽

Houssam-Eddine Zahaf ◽

Giuseppe Lipari

Keyword(s):

Real Time ◽

Chip Multiprocessors ◽

Networks On Chip ◽

On Chip

Designing Predictable Cache Coherence Protocols for Multi-Core Real-Time Systems

IEEE Transactions on Computers ◽

10.1109/tc.2020.3037747 ◽

2020 ◽

pp. 1-1

Author(s):

Anirudh Mohan Kaushik ◽

Mohamed Hassan ◽

Hiren Patel

Keyword(s):

Real Time ◽

Cache Coherence ◽

Real Time Systems ◽

Coherence Protocols ◽

Time Systems