Voltage Balancing Control of Diode-Clamped Multilevel Converters with Passive Front-Ends

2007 ◽  
Author(s):  
Sergio Busquets-Monge ◽  
Salvador Alepuz ◽  
Josep Bordonau ◽  
Juan Peracaula
Keyword(s):  
Multilevel Converters ◽  
Voltage Balancing ◽  
Balancing Control

A Currentless Submodule Individual Voltage Balancing Control for Modular Multilevel Converters

2020 ◽  
Vol 67 (11) ◽  
pp. 9370-9382
Author(s):  
Fujin Deng ◽  
Chengkai Liu ◽  
Qingsong Wang ◽  
Rongwu Zhu ◽  
Xu Cai ◽  
...  
Keyword(s):  
Multilevel Converters ◽  
Voltage Balancing ◽  
Modular Multilevel Converters ◽  
Balancing Control

Voltage Balancing Control of Diode-Clamped Multilevel Converters With Passive Front-Ends

2008 ◽  
Vol 23 (4) ◽  
pp. 1751-1758 ◽  
Author(s):  
Sergio Busquets-Monge ◽  
Salvador Alepuz ◽  
Josep Bordonau ◽  
Juan Peracaula
Keyword(s):  
Multilevel Converters ◽  
Voltage Balancing ◽  
Balancing Control

scholarly journals Current Balancing Control for Interleaved Half-Bridge Submodules in Modular Multilevel Converters

2021 ◽  
Author(s):  
Aleksandr Viatkin ◽  
Mattia Ricco ◽  
Riccardo Mandrioli ◽  
Tamas Kerekes ◽  
Remus Teodorescu ◽  
...  
Keyword(s):  
Dynamic Performance ◽  
Experimental Tests ◽  
Current Control ◽  
System Response ◽  
Loop Current ◽  
Multilevel Converters ◽  
Voltage Balancing ◽  
Modular Multilevel Converters ◽  
Capacitor Voltage ◽  
Balancing Control

This paper presents a closed-loop current balancing control for Modular Multilevel Converters with Interleaved half-bridge Sub-Modules (ISM-MMC). The new control loop solves the well-known problem of proper current balancing among interleaved half-bridge legs in each ISM-MMC submodule while preserving a simple and reliable structure. In addition to that, a novel capacitor voltage balancing strategy for MMCs is developed. The new algorithm contains main advantages of the classical capacitor voltage balancing methods while provides an opportunity to decouple two balancing tasks of ISM-MMC, namely capacitor voltage and interleaved legs current balancing. The proposed control methods feature good dynamic performance and are compliant with a digital processor's operational constraints. The effectiveness of the new balancing methods was verified during extensive numerical simulations and experimental tests on a laboratory prototype by the corresponding system response under the input/output characteristics variation and interleaved current control perturbation.

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