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VLSI Design 2013 Conference Committee
2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems
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10.1109/vlsid.2013.126
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2013
◽
Keyword(s):
Vlsi Design
◽
Conference Committee
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Cited By
References
VLSI Design and Embedded Systems 2020 Conference Committee
2020 33rd International Conference on VLSI Design and 2020 19th International Conference on Embedded Systems (VLSID)
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10.1109/vlsid49098.2020.00011
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2020
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Keyword(s):
Embedded Systems
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Vlsi Design
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Conference Committee
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VLSI Design 2016 Conference Committee
2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID)
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10.1109/vlsid.2016.7
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2016
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Keyword(s):
Vlsi Design
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Conference Committee
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VLSI Design 2015 Conference Committee
2015 28th International Conference on VLSI Design
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10.1109/vlsid.2015.7
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2015
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Keyword(s):
Vlsi Design
◽
Conference Committee
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VLSI Design 2017 Conference Committee
2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID)
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10.1109/vlsid.2017.82
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2017
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Keyword(s):
Vlsi Design
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Conference Committee
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VLSI Design 2013 Conference Committee
2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems
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10.1109/vlsid.2014.110
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2014
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Keyword(s):
Vlsi Design
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Conference Committee
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VLSI design 2004 conference committee
17th International Conference on VLSI Design. Proceedings.
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10.1109/icvd.2004.1324110
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2004
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Keyword(s):
Vlsi Design
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Conference Committee
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VLSI Design 2012 Conference Committee
2012 25th International Conference on VLSI Design
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10.1109/vlsid.2012.16
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2012
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Keyword(s):
Vlsi Design
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Conference Committee
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Advanced Model Order Reduction Techniques in VLSI Design
10.1017/cbo9780511541117
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2007
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Cited By ~ 77
Author(s):
Sheldon Tan
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Lei He
Keyword(s):
Model Order Reduction
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Vlsi Design
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Order Reduction
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Model Order
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Reduction Techniques
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Advanced Model
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Theoretical Foundations of VLSI Design
10.1017/cbo9780511569838
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1990
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Cited By ~ 5
Keyword(s):
Vlsi Design
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Theoretical Foundations
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VLSI design for diminished-1 multiplication of integers modulo a Fermat number
IEE Proceedings E Computers and Digital Techniques
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10.1049/ip-e.1988.0019
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1988
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Vol 135
(3)
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pp. 161
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Cited By ~ 3
Author(s):
M. Benaissa
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A. Pajayakrit
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S.S. Dlay
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A.G.J. Holt
Keyword(s):
Vlsi Design
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Fermat Number
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