Fault-Tolerant Matrix Operations On Multiple Processor Systems Using Weighted Checksums

Mapping Intimacies ◽

10.1117/12.944013 ◽

1984 ◽

Author(s):

Jing-Yang Jou ◽

Jacob A. Abraham

Keyword(s):

Fault Tolerant ◽

Matrix Operations ◽

Multiple Processor

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Fault tolerant matrix operations for networks of workstations using multiple checkpointing

Proceedings High Performance Computing on the Information Superhighway. HPC Asia '97 ◽

10.1109/hpc.1997.592191 ◽

2002 ◽

Author(s):

Youngbae Kim ◽

J.S. Plank ◽

J.J. Dongarra

Keyword(s):

Fault Tolerant ◽

Matrix Operations

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Fault-Tolerant Multiple Processor Systems—Modeling and Analysis

Handbook of Advanced Semiconductor Technology and Computer Systems ◽

10.1007/978-94-011-7056-7_24 ◽

1988 ◽

pp. 776-796 ◽

Author(s):

Kishor Trivedi ◽

Robert Geist

Keyword(s):

Fault Tolerant ◽

Systems Modeling ◽

Modeling And Analysis ◽

Multiple Processor

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A Fault-Tolerant Multiple Processor for Front-End Process Control

Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems - Informatik-Fachberichte ◽

10.1007/978-3-642-45628-2_37 ◽

1987 ◽

pp. 387-388

Author(s):

K. Chmillon ◽

J. Heger ◽

H. Herzberger

Keyword(s):

Process Control ◽

Fault Tolerant ◽

Front End ◽

Multiple Processor

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New encoding/decoding methods for designing fault-tolerant matrix operations

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/71.536937 ◽

1996 ◽

Vol 7 (9) ◽

pp. 931-938 ◽

Author(s):

D.L. Tao ◽

C.R.P. Hartmann ◽

Y.S. Han

Keyword(s):

Fault Tolerant ◽

Matrix Operations

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Real-number codes for fault-tolerant matrix operations on processor arrays

IEEE Transactions on Computers ◽

10.1109/12.54836 ◽

1990 ◽

Vol 39 (4) ◽

pp. 426-435 ◽

Author(s):

V.S.S. Nair ◽

J.A. Abraham

Keyword(s):

Real Number ◽

Fault Tolerant ◽

Matrix Operations ◽

Processor Arrays ◽

Real Number Codes

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Roundoff error-free tests in algorithm-based fault tolerant matrix operations on 2-D processor arrays

IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems DFTVS-94 ◽

10.1109/dftvs.1994.630016 ◽

2002 ◽

Author(s):

D.-Y.D. Wei ◽

J.H. Kim ◽

T.R.N. Rao

Keyword(s):

Fault Tolerant ◽

Roundoff Error ◽

Matrix Operations ◽

Processor Arrays

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General linear codes for fault-tolerant matrix operations on processor arrays

[1988] The Eighteenth International Symposium on Fault-Tolerant Computing. Digest of Papers ◽

10.1109/ftcs.1988.5317 ◽

2003 ◽

Author(s):

V.S.S. Nair ◽

J.A. Abraham

Keyword(s):

Linear Codes ◽

Fault Tolerant ◽

General Linear ◽

Matrix Operations ◽

Processor Arrays

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A Real-time Fault-tolerant Scheduling Algorithm for Multiple Processor Faults

JOURNAL OF ELECTRONICS INFORMATION TECHNOLOGY ◽

10.3724/sp.j.1146.2009.00263 ◽

2010 ◽

Vol 32 (2) ◽

pp. 444-448 ◽

Author(s):

Jin-yong Yin ◽

Guo-chang Gu

Keyword(s):

Real Time ◽

Fault Tolerant ◽

Scheduling Algorithm ◽

Multiple Processor

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Optimal real number codes for fault tolerant matrix operations

Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis - SC '09 ◽

10.1145/1654059.1654089 ◽

2009 ◽

Author(s):

Zizhong Chen

Keyword(s):

Real Number ◽

Fault Tolerant ◽

Matrix Operations ◽

Real Number Codes

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A modular fault-tolerant multiple processor for front-end process control

IFAC Proceedings Volumes ◽

10.1016/b978-0-08-034206-1.50020-9 ◽

1987 ◽

Vol 20 (14) ◽

pp. 129-134

Author(s):

K. Chmillon ◽

J. Heger ◽

H. Herzberger

Keyword(s):

Process Control ◽

Fault Tolerant ◽

Front End ◽

Multiple Processor

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