A DSP–FPGA-BASED RECONFIGURABLE COMPUTER
1998 ◽
Vol 08
(04)
◽
pp. 453-459
Keyword(s):
In order to exploit architectural advantages associated with specific computations while at the same time having flexibility in those computations, we have designed a reconfigurable parallel machine architecture. A prototype reconfigurable computer has been constructed based on digital signal processing (DSP) chips and field-programmable gate arrays (FPGAs). Communications are based upon a broadcast network that employs FPGA-based message pre-processing and post-processing. Tradeoffs between computational and communication performance are made possible by software reconfiguration of the FPGAs. The system has been successfully tested on several applications in signal processing.
2010 ◽
Vol 53
(4)
◽
pp. 638-645
◽
2019 ◽
Vol 16
(7)
◽
pp. 2900-2906
2005 ◽
Vol 48
(3)
◽
pp. 551-558
◽