Inductive Temporal Formula Specifications for System Verification

2005 ◽  
Vol 9 (3) ◽  
pp. 321-328
Author(s):  
Chikatoshi Yamada ◽  
◽  
Yasunori Nagata ◽  
Zensho Nakao ◽  
Keyword(s):  
Model Checking ◽  
Complex Systems ◽  
Large Scale ◽  
Design Verification ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
System Verification ◽  
Temporal Formula ◽  
Temporal Specification

Design verification has played an important role in the design of large scale and complex systems. In this article, we focus on model checking methods. Behaviors of modeled systems are in general specified by temporal formulas of computation tree logic, and users must know well about temporal specification because the specification might be complex. We propose a method temporal formulas are obtained inductively, and amounts of memory and time are reduced. We will show verification results using the proposed method.

An Efficient Specification for System Verification

2006 ◽  
Vol 10 (6) ◽  
pp. 931-938
Author(s):  
Chikatoshi Yamada ◽  
◽  
Yasunori Nagata ◽  
Zensho Nakao ◽  
Keyword(s):  
Model Checking ◽  
Execution Time ◽  
Large Scale ◽  
Large Scale Systems ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Specification Method ◽  
System Verification ◽  
Temporal Formula ◽  
Temporal Specification

In design of complex and large scale systems, system verification has played an important role. In this article, we focus on specification process of model checking in system verifications. Modeled systems are in general specified by temporal formulas of computation tree logic, and users must know well about temporal specification because the specification might be complex. We propose a method by which specifications with temporal formulas are obtained inductively. We will show verification results using the proposed temporal formula specification method, and show that amount of memory, OBDD nodes, and execution time are reduced.

Bounded Model Checking for Probabilistic Computation Tree Logic

2012 ◽  
Vol 23 (7) ◽  
pp. 1656-1668 ◽  
Author(s):  
Cong-Hua ZHOU ◽  
Zhi-Feng LIU ◽  
Chang-Da WANG
Keyword(s):  
Model Checking ◽  
Bounded Model Checking ◽  
Probabilistic Computation ◽  
Computation Tree Logic ◽  
Computation Tree

Bounded Model Checking for Weighted Interpreted Systems and for Flat Weighted Epistemic Computation Tree Logic

2014 ◽  
pp. 107-115 ◽  
Author(s):  
Bożena Woźna-Szcześniak ◽  
Ireneusz Szcześniak ◽  
Agnieszka M. Zbrzezny ◽  
Andrzej Zbrzezny
Keyword(s):  
Model Checking ◽  
Bounded Model Checking ◽  
Computation Tree Logic ◽  
Computation Tree

scholarly journals Incremental Construction of Counterexamples in Model Checking Web Documents

10.29007/c8jt ◽  
2018 ◽  
Author(s):  
Franz Weitl ◽  
Shin Nakajima
Keyword(s):  
Model Checking ◽  
Description Logic ◽  
Level Of Detail ◽  
Web Documents ◽  
Web Based ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Incremental Construction ◽  
Analysis Of Error

A new algorithm for incrementally generating counterexamples for the temporal description logic ALCCTL is presented. ALCCTL is a decidable combination of the description logic ALC and computation tree logic CTL that is expressive for content- and structure-related properties of web documents being verified by model checking. In the case of a specification violation, existing model checkers provide a single counterexample which may be large and complex. We extend existing algorithms for generating counterexamples in two ways. First, a coarse counterexample is generated initially that can be refined subsequently to the desired level of detail in an incremental manner. Second, the user can choose where and in which way a counterexample is refined. This enables the interactive step-by-step analysis of error scenarios according to the user's interest.We demonstrate in a case study on a web-based training document that the proposed approach reveals more errors and explains the cause of errors more precisely than the counterexamples of existing model checkers. In addition, we demonstrate that the proposed algorithm is sufficiently fast to enable smooth interaction even in the case of large documents.

Model Checking for Computation Tree Logic with Past Based on DNA Computing

2017 ◽  
pp. 131-147 ◽  
Author(s):  
Yingjie Han ◽  
Qinglei Zhou ◽  
Linfeng Jiao ◽  
Kai Nie ◽  
Chunyan Zhang ◽  
...  
Keyword(s):  
Model Checking ◽  
Dna Computing ◽  
Computation Tree Logic ◽  
Computation Tree

Logical foundations of hierarchical model checking

2018 ◽  
Vol 52 (4) ◽  
pp. 539-563 ◽  
Author(s):  
Norihiro Kamide
Keyword(s):  
Model Checking ◽  
Temporal Logic ◽  
Hierarchical Model ◽  
Design Methodology ◽  
Linear Time ◽  
Hierarchical Systems ◽  
Content Type ◽  
Computation Tree Logic ◽  
Computation Tree ◽  
Linear Time Temporal Logic

Purpose The purpose of this paper is to develop new simple logics and translations for hierarchical model checking. Hierarchical model checking is a model-checking paradigm that can appropriately verify systems with hierarchical information and structures. Design/methodology/approach In this study, logics and translations for hierarchical model checking are developed based on linear-time temporal logic (LTL), computation-tree logic (CTL) and full computation-tree logic (CTL*). A sequential linear-time temporal logic (sLTL), a sequential computation-tree logic (sCTL), and a sequential full computation-tree logic (sCTL*), which can suitably represent hierarchical information and structures, are developed by extending LTL, CTL and CTL*, respectively. Translations from sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are defined, and theorems for embedding sLTL, sCTL and sCTL* into LTL, CTL and CTL*, respectively, are proved using these translations. Findings These embedding theorems allow us to reuse the standard LTL-, CTL-, and CTL*-based model-checking algorithms to verify hierarchical systems that are modeled and specified by sLTL, sCTL and sCTL*. Originality/value The new logics sLTL, sCTL and sCTL* and their translations are developed, and some illustrative examples of hierarchical model checking are presented based on these logics and translations.

scholarly journals Vectorized model checking for computation tree logic

2005 ◽  
pp. 44-53 ◽  
Author(s):  
Hiromi Hiraishi ◽  
Shintaro Meki ◽  
Kiyoharu Hamaguchi
Keyword(s):  
Model Checking ◽  
Computation Tree Logic ◽  
Computation Tree
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