2009 IEEE 15th International Symposium on High Performance Computer Architecture
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TOTAL DOCUMENTS

58

(FIVE YEARS 0)

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23

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Published By IEEE

9781424429325

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Accurate microarchitecture-level fault modeling for studying hardware faults

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798242 ◽

2009 ◽

Author(s):

Man-Lap Li ◽

Pradeep Ramachandran ◽

Ulya R. Karpuzcu ◽

Siva Kumar Sastry Hari ◽

Sarita V. Adve

Keyword(s):

Fault Modeling ◽

Hardware Faults

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Criticality-based optimizations for efficient load processing

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798280 ◽

2009 ◽

Author(s):

Samantika Subramaniam ◽

Anne Bracy ◽

Hong Wang ◽

Gabriel H. Loh

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Fast complete memory consistency verification

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798276 ◽

2009 ◽

Author(s):

Yunji Chen ◽

Yi Lv ◽

Weiwu Hu ◽

Tianshi Chen ◽

Haihua Shen ◽

...

Keyword(s):

Memory Consistency ◽

Consistency Verification

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Prediction router: Yet another low latency on-chip router architecture

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798274 ◽

2009 ◽

Author(s):

Hiroki Matsutani ◽

Michihiro Koibuchi ◽

Hideharu Amano ◽

Tsutomu Yoshinaga

Keyword(s):

Low Latency ◽

Router Architecture ◽

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How to build programmable multi-core chips

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798284 ◽

2009 ◽

Author(s):

Jack Dennis

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Elastic-buffer flow control for on-chip networks

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798250 ◽

2009 ◽

Author(s):

George Michelogiannakis ◽

James Balfour ◽

William J. Dally

Keyword(s):

Flow Control ◽

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PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798258 ◽

2009 ◽

Author(s):

Mainak Chaudhuri

Keyword(s):

Chip Multiprocessor

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Bridging the computation gap between programmable processors and hardwired accelerators

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798266 ◽

2009 ◽

Author(s):

Kevin Fan ◽

Manjunath Kudlur ◽

Ganesh Dasika ◽

Scott Mahlke

Keyword(s):

Programmable Processors

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Voltage emergency prediction: Using signatures to reduce operating margins

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798233 ◽

2009 ◽

Author(s):

Vijay Janapa Reddi ◽

Meeta S. Gupta ◽

Glenn Holloway ◽

Gu-Yeon Wei ◽

Michael D. Smith ◽

...

Keyword(s):

Operating Margins

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Reconciling specialization and flexibility through compound circuits

2009 IEEE 15th International Symposium on High Performance Computer Architecture ◽

10.1109/hpca.2009.4798263 ◽

2009 ◽

Author(s):

Sami Yehia ◽

Sylvain Girbal ◽

Hugues Berry ◽

Olivier Temam

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