Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods
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Published By Springer Berlin Heidelberg

9783540203636, 9783540397243

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Exact and Efficient Verification of Parameterized Cache Coherence Protocols

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_22 ◽

2003 ◽

pp. 247-262 ◽

Cited By ~ 43

Author(s):

E. Allen Emerson ◽

Vineet Kahlon

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocols ◽

Coherence Protocols ◽

Efficient Verification

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The ROBDD Size of Simple CNF Formulas

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_32 ◽

2003 ◽

pp. 363-377 ◽

Cited By ~ 3

Author(s):

Michael Langberg ◽

Amir Pnueli ◽

Yoav Rodeh

Keyword(s):

Cnf Formulas

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Coverage Metrics for Formal Verification

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_11 ◽

2003 ◽

pp. 111-125 ◽

Cited By ~ 30

Author(s):

Hana Chockler ◽

Orna Kupferman ◽

Moshe Y. Vardi

Keyword(s):

Formal Verification ◽

Coverage Metrics

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Semi-formal Verification of Memory Systems by Symbolic Simulation

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_15 ◽

2003 ◽

pp. 158-163

Author(s):

Husam Abu-Haimed ◽

Sergey Berezin ◽

David L. Dill

Keyword(s):

Formal Verification ◽

Memory Systems ◽

Symbolic Simulation

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The Charme of Abstract Entities

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_2 ◽

2003 ◽

pp. 2-2

Author(s):

Fabio Somenzi

Keyword(s):

Abstract Entities

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On Complementing Nondeterministic Büchi Automata

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_10 ◽

2003 ◽

pp. 96-110 ◽

Cited By ~ 24

Author(s):

Sankar Gurumurthy ◽

Orna Kupferman ◽

Fabio Somenzi ◽

Moshe Y. Vardi

Keyword(s):

Büchi Automata ◽

Buchi Automata

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Efficient Symbolic Model Checking of Software Using Partial Disjunctive Partitioning

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_6 ◽

2003 ◽

pp. 35-50 ◽

Cited By ~ 9

Author(s):

Sharon Barner ◽

Ishai Rabinovitz

Keyword(s):

Model Checking ◽

Symbolic Model Checking ◽

Symbolic Model

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What Is beyond the RTL Horizon for Microprocessor and System Design?

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_1 ◽

2003 ◽

pp. 1-1 ◽

Cited By ~ 4

Author(s):

Wolfgang Roesner

Keyword(s):

System Design

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A Compositional Theory of Refinement for Branching Time

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_28 ◽

2003 ◽

pp. 304-318 ◽

Cited By ~ 16

Author(s):

Panagiotis Manolios

Keyword(s):

Branching Time

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Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods ◽

10.1007/978-3-540-39724-3_30 ◽

2003 ◽

pp. 334-347 ◽

Cited By ~ 8

Author(s):

Malay K Ganai ◽

Aarti Gupta ◽

Zijiang Yang ◽

Pranav Ashar

Keyword(s):

Model Checking ◽

Bounded Model Checking

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Lecture Notes in Computer Science - Correct Hardware Design and Verification MethodsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Berlin Heidelberg

Exact and Efficient Verification of Parameterized Cache Coherence Protocols

The ROBDD Size of Simple CNF Formulas

Coverage Metrics for Formal Verification

Semi-formal Verification of Memory Systems by Symbolic Simulation

The Charme of Abstract Entities

On Complementing Nondeterministic Büchi Automata

Efficient Symbolic Model Checking of Software Using Partial Disjunctive Partitioning

What Is beyond the RTL Horizon for Microprocessor and System Design?

A Compositional Theory of Refinement for Branching Time

Efficient Distributed SAT and SAT-Based Distributed Bounded Model Checking

Lecture Notes in Computer Science - Correct Hardware Design and Verification Methods
Latest Publications