Lecture Notes in Electrical Engineering - Network-on-Chip Architectures
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Published By Springer Netherlands

9789048130306, 9789048130313

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Digest of Additional NoC MACRO-Architectural Research

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_10 ◽

2009 ◽

pp. 199-205

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Architectural Research

Exploring FaultoTolerant Network-on-Chip Architectures [37]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_5 ◽

2009 ◽

pp. 65-92

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Network On Chip ◽

On Chip

RoCo: The Row–Column Decoupled Router – A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks [40]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_4 ◽

2009 ◽

pp. 41-64

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Energy Efficient ◽

Router Architecture ◽

On Chip

Conclusions and Future Work

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_11 ◽

2009 ◽

pp. 207-209

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Future Work

A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures [44]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_9 ◽

2009 ◽

pp. 171-197

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

On Chip

Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem) [43]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_8 ◽

2009 ◽

pp. 147-170

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Chip Multiprocessors

A Baseline NoC Architecture

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_2 ◽

2009 ◽

pp. 13-16

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

The Quest for Scalable On-Chip Interconnection Networks: Bus/NoC Hybridization [15]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_7 ◽

2009 ◽

pp. 119-146

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Interconnection Networks ◽

On Chip

Introduction

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_1 ◽

2009 ◽

pp. 1-12

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers [39]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures ◽

10.1007/978-90-481-3031-3_3 ◽

2009 ◽

pp. 19-40 ◽

Cited By ~ 2

Author(s):

Chrysostomos Nicopoulos ◽

Vijaykrishnan Narayanan ◽

Chita R. Das

Keyword(s):

Virtual Channel

Lecture Notes in Electrical Engineering - Network-on-Chip ArchitecturesLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer Netherlands

Digest of Additional NoC MACRO-Architectural Research

Exploring FaultoTolerant Network-on-Chip Architectures [37]

RoCo: The Row–Column Decoupled Router – A Gracefully Degrading and Energy-Efficient Modular Router Architecture for On-Chip Networks [40]

Conclusions and Future Work

A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures [44]

Design and Management of 3D Chip Multiprocessors Using Network-In-Memory (NetInMem) [43]

A Baseline NoC Architecture

The Quest for Scalable On-Chip Interconnection Networks: Bus/NoC Hybridization [15]

Introduction

ViChaR: A Dynamic Virtual Channel Regulator for NoC Routers [39]

Lecture Notes in Electrical Engineering - Network-on-Chip Architectures
Latest Publications