Hardware and Software: Verification and Testing - Lecture Notes in Computer Science
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9783319133379, 9783319133386

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Enhancing Scenario Quality Using Quasi-Events

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_2 ◽

2014 ◽

pp. 17-29

Author(s):

Yoav Katz ◽

Eitan Marcus ◽

Avi Ziv

Keyword(s):

Scenario Quality

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Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_3 ◽

2014 ◽

pp. 30-47

Author(s):

Georges Morbé ◽

Christian Miller ◽

Christoph Scholl ◽

Bernd Becker

Keyword(s):

Model Checking ◽

Symbolic Model Checking ◽

Timed Systems ◽

Symbolic Model

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Read, Write and Copy Dependencies for Symbolic Model Checking

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_16 ◽

2014 ◽

pp. 204-219 ◽

Cited By ~ 14

Author(s):

Jeroen Meijer ◽

Gijs Kant ◽

Stefan Blom ◽

Jaco van de Pol

Keyword(s):

Model Checking ◽

Symbolic Model Checking ◽

Symbolic Model

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Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_17 ◽

2014 ◽

pp. 220-235 ◽

Cited By ~ 3

Author(s):

Angelo Gargantini ◽

Paolo Vavassori

Keyword(s):

Test Generation ◽

Decision Diagrams

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Automatic Error Localization for Software Using Deductive Verification

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_8 ◽

2014 ◽

pp. 92-98 ◽

Cited By ~ 3

Author(s):

Robert Könighofer ◽

Ronald Toegl ◽

Roderick Bloem

Keyword(s):

Deductive Verification ◽

Error Localization ◽

Automatic Error

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Formal Verification of Secure User Mode Device Execution with DMA

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_18 ◽

2014 ◽

pp. 236-251 ◽

Cited By ~ 6

Author(s):

Oliver Schwarz ◽

Mads Dam

Keyword(s):

Formal Verification

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Supervisory Control of Discrete-Event Systems via IC3

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_19 ◽

2014 ◽

pp. 252-266 ◽

Cited By ~ 3

Author(s):

Mohammad Reza Shoaei ◽

Laura Kovács ◽

Bengt Lennartson

Keyword(s):

Supervisory Control ◽

Discrete Event Systems ◽

Discrete Event ◽

Event Systems

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Reduction of Resolution Refutations and Interpolants via Subsumption

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_15 ◽

2014 ◽

pp. 188-203 ◽

Cited By ~ 3

Author(s):

Roderick Bloem ◽

Sharad Malik ◽

Matthias Schlaipfer ◽

Georg Weissenbacher

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Synthesizing Finite-State Protocols from Scenarios and Requirements

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_7 ◽

2014 ◽

pp. 75-91 ◽

Cited By ~ 16

Author(s):

Rajeev Alur ◽

Milo Martin ◽

Mukund Raghothaman ◽

Christos Stergiou ◽

Stavros Tripakis ◽

...

Keyword(s):

Finite State

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Suraq — A Controller Synthesis Tool Using Uninterpreted Functions

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science ◽

10.1007/978-3-319-13338-6_6 ◽

2014 ◽

pp. 68-74

Author(s):

Georg Hofferek ◽

Ashutosh Gupta

Keyword(s):

Controller Synthesis ◽

Synthesis Tool

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Hardware and Software: Verification and Testing - Lecture Notes in Computer ScienceLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Springer International Publishing

Enhancing Scenario Quality Using Quasi-Events

Combined Bounded and Symbolic Model Checking for Incomplete Timed Systems

Read, Write and Copy Dependencies for Symbolic Model Checking

Efficient Combinatorial Test Generation Based on Multivalued Decision Diagrams

Automatic Error Localization for Software Using Deductive Verification

Formal Verification of Secure User Mode Device Execution with DMA

Supervisory Control of Discrete-Event Systems via IC3

Reduction of Resolution Refutations and Interpolants via Subsumption

Synthesizing Finite-State Protocols from Scenarios and Requirements

Suraq — A Controller Synthesis Tool Using Uninterpreted Functions

Hardware and Software: Verification and Testing - Lecture Notes in Computer Science
Latest Publications