High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing
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Published By Springer New York

9781461449621, 9781461449638

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Adaptive XTCR, AGC, and Adaptive DFE Loop

High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing ◽

10.1007/978-1-4614-4963-8_4 ◽

2013 ◽

pp. 47-67

Author(s):

Taehyoun Oh ◽

Ramesh Harjani

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$$2\times 6$$ 2 × 6 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Scheme in 130 nm CMOS Process

High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing ◽

10.1007/978-1-4614-4963-8_2 ◽

2013 ◽

pp. 11-25

Author(s):

Taehyoun Oh ◽

Ramesh Harjani

Keyword(s):

Cmos Process ◽

Crosstalk Cancellation

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Introduction

High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing ◽

10.1007/978-1-4614-4963-8_1 ◽

2013 ◽

pp. 1-9

Author(s):

Taehyoun Oh ◽

Ramesh Harjani

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Research Summary and Contributions

High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing ◽

10.1007/978-1-4614-4963-8_5 ◽

2013 ◽

pp. 69-71

Author(s):

Taehyoun Oh ◽

Ramesh Harjani

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$$4 \times 12$$ 4 × 12 Gb/s MIMO Crosstalk Cancellation and Signal Reutilization Receiver in 65 nm CMOS Process

High Performance Multi-Channel High-Speed I/O Circuits - Analog Circuits and Signal Processing ◽

10.1007/978-1-4614-4963-8_3 ◽

2013 ◽

pp. 27-46

Author(s):

Taehyoun Oh ◽

Ramesh Harjani

Keyword(s):

Cmos Process ◽

Crosstalk Cancellation

Download Full-text