High‐throughput FPGA implementation for quadratic unconstrained binary optimization

Concurrency and Computation Practice and Experience ◽

10.1002/cpe.6565 ◽

2021 ◽

Author(s):

Hiroshi Kagawa ◽

Yasuaki Ito ◽

Koji Nakano ◽

Ryota Yasudo ◽

Yuya Kawamata ◽

...

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Binary Optimization ◽

Quadratic Unconstrained Binary Optimization

FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold

2010 NASA/ESA Conference on Adaptive Hardware and Systems ◽

10.1109/ahs.2010.5546236 ◽

2010 ◽

Cited By ~ 1

Author(s):

Xiang Wu ◽

John S. Thompson

Keyword(s):

High Throughput ◽

Mimo Systems ◽

Fpga Implementation ◽

Singular Value ◽

Sphere Decoder ◽

Smallest Singular Value

FPGA Implementation of Decoder Architectures for High Throughput Irregular LDPC Codes

Indian Journal of Science and Technology ◽

10.17485/ijst/2016/v9i48/97269 ◽

2016 ◽

Vol 9 (48) ◽

Cited By ~ 1

Author(s):

Sandeep Kakde ◽

Atish Khobragade ◽

M. D. Ekbal Husain

Keyword(s):

High Throughput ◽

Ldpc Codes ◽

Fpga Implementation ◽

Irregular Ldpc Codes

Logical and inequality implications for reducing the size and difficulty of quadratic unconstrained binary optimization problems

European Journal of Operational Research ◽

10.1016/j.ejor.2017.08.025 ◽

2018 ◽

Vol 265 (3) ◽

pp. 829-842 ◽

Cited By ~ 4

Author(s):

Fred Glover ◽

Mark Lewis ◽

Gary Kochenberger

Keyword(s):

Optimization Problems ◽

Binary Optimization ◽

Quadratic Unconstrained Binary Optimization

A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2019.2936260 ◽

2020 ◽

Vol 28 (1) ◽

pp. 101-114 ◽

Cited By ~ 1

Author(s):

Jin Woo Park ◽

Hyokeun Lee ◽

Boyeal Kim ◽

Dong-Goo Kang ◽

Seung Oh Jin ◽

...

Keyword(s):

Real Time ◽

High Throughput ◽

Low Cost ◽

Fpga Implementation ◽

Video Enhancement ◽

Retinex Algorithm

A WiMAX/LTE compliant FPGA implementation of a high-throughput low-complexity 4×4 64-QAM soft MIMO receiver

2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers ◽

10.1109/acssc.2010.5757541 ◽

2010 ◽

Cited By ~ 2

Author(s):

Vadim Smolyakov ◽

Dimpesh Patel ◽

Mahdi Shabany ◽

P. Glenn Gulak

Keyword(s):

High Throughput ◽

Low Complexity ◽

Fpga Implementation

High-Throughput FPGA Implementation of QR Decomposition

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2015.2435753 ◽

2015 ◽

Vol 62 (9) ◽

pp. 861-865 ◽

Cited By ~ 22

Author(s):

Sergio D. Munoz ◽

Javier Hormigo

Keyword(s):

High Throughput ◽

Qr Decomposition ◽

Fpga Implementation

Quadratic Unconstrained Binary Optimization (QUBO) on neuromorphic computing system

2017 International Joint Conference on Neural Networks (IJCNN) ◽

10.1109/ijcnn.2017.7966350 ◽

2017 ◽

Cited By ~ 8

Author(s):

Md Zahangir Alom ◽

Brian Van Essen ◽

Adam T. Moody ◽

David Peter Widemann ◽

Tarek M. Taha

Keyword(s):

Computing System ◽

Neuromorphic Computing ◽

Binary Optimization ◽

Quadratic Unconstrained Binary Optimization

An algorithmic transformation for FPGA implementation of high throughput filters

2011 7th International Conference on Emerging Technologies ◽

10.1109/icet.2011.6048450 ◽

2011 ◽

Cited By ~ 3

Author(s):

Hamid M. Kamboh ◽

Shoab A. Khan

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Algorithmic Transformation

Architecture and FPGA-implementation of a high throughput K+-Best detector

2011 Design, Automation & Test in Europe ◽

10.1109/date.2011.5763049 ◽

2011 ◽

Cited By ~ 4

Author(s):

N Heidmann ◽

T Wiegand ◽

S Paul

Keyword(s):

High Throughput ◽

Fpga Implementation

High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106970 ◽

2017 ◽

Cited By ~ 2

Author(s):

Nikolaos Kefalas ◽

George Theodoridis

Keyword(s):

High Throughput ◽

Fpga Implementation