2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
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Published By IEEE

9781509064625

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Fault-tolerant routing methodology for Networks-on-Chip

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106993 ◽

2017 ◽

Author(s):

S. Savva

Keyword(s):

Fault Tolerant ◽

Networks On Chip ◽

On Chip

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Modeling energy-performance tradeoffs in ARM big.LITTLE architectures

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106950 ◽

2017 ◽

Cited By ~ 2

Author(s):

Evangelos Vasilakis ◽

Ioannis Sourdis ◽

Vassilis Papaefstathiou ◽

Antonis Psathakis ◽

Manolis G.H. Katevenis

Keyword(s):

Energy Performance

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Rapid power-management exploration using post-processing of the system-level simulation results

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106965 ◽

2017 ◽

Author(s):

Dominik Macko

Keyword(s):

Power Management ◽

System Level ◽

Post Processing ◽

System Level Simulation ◽

Simulation Results

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Memristive two-ports

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106954 ◽

2017 ◽

Cited By ~ 3

Author(s):

Dalibor Biolek ◽

Zdenek Biolek ◽

Viera Biolkova

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Architecture exploration of a fixed point computation unit using precise timing spiking neurons

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106989 ◽

2017 ◽

Author(s):

Thomas Mesquida ◽

Alexandre Valentian ◽

David Bol ◽

Edith Beigne

Keyword(s):

Fixed Point ◽

Spiking Neurons ◽

Precise Timing ◽

Fixed Point Computation ◽

Architecture Exploration

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On the origin of the fading memory effect in ReRAMs

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106963 ◽

2017 ◽

Cited By ~ 2

Author(s):

S. Menzel ◽

R. Waser ◽

A. Siemon ◽

C. La Torre ◽

M. Schulten ◽

...

Keyword(s):

Memory Effect ◽

Fading Memory

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High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106970 ◽

2017 ◽

Cited By ~ 2

Author(s):

Nikolaos Kefalas ◽

George Theodoridis

Keyword(s):

High Throughput ◽

Fpga Implementation

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Variability and sensitivity to process parameters variations in InGaAs dual-gate ultra-thin body MOSFETs: A scaling perspective

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106966 ◽

2017 ◽

Author(s):

Nicolo Zagni ◽

Francesco Maria Puglisi ◽

Giovanni Verzellesi ◽

Paolo Pavan

Keyword(s):

Process Parameters ◽

Thin Body ◽

Dual Gate

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Edge effect aware crosstalk avoidance technique for 3D integration

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106994 ◽

2017 ◽

Cited By ~ 1

Author(s):

Lennart Bamberg ◽

Amir Najafi ◽

Alberto Garcia-Ortiz

Keyword(s):

Edge Effect ◽

3D Integration ◽

Crosstalk Avoidance

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An FPGA-based thermal emulation framework for multicore systems

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) ◽

10.1109/patmos.2017.8106964 ◽

2017 ◽

Author(s):

Md Shahidul Alam ◽

Alberto Garcia-Ortiz

Keyword(s):

Multicore Systems

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2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Fault-tolerant routing methodology for Networks-on-Chip

Modeling energy-performance tradeoffs in ARM big.LITTLE architectures

Rapid power-management exploration using post-processing of the system-level simulation results

Memristive two-ports

Architecture exploration of a fixed point computation unit using precise timing spiking neurons

On the origin of the fading memory effect in ReRAMs

High-throughput FPGA implementation of the CCSDS 122.0-B-1 compression standard

Variability and sensitivity to process parameters variations in InGaAs dual-gate ultra-thin body MOSFETs: A scaling perspective

Edge effect aware crosstalk avoidance technique for 3D integration

An FPGA-based thermal emulation framework for multicore systems

2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
Latest Publications