An iterative array processor architecture for matrix computation

PARLE'94 Parallel Architectures and Languages Europe - Lecture Notes in Computer Science ◽

10.1007/3-540-58184-7_155 ◽

1994 ◽

pp. 777-780

Author(s):

Stephen P. S. Lam

Keyword(s):

Array Processor ◽

Processor Architecture ◽

Matrix Computation

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Array-processor Architecture

Architecture of High Performance Computers Volume II ◽

10.1007/978-1-4899-6701-5_2 ◽

1989 ◽

pp. 6-21

Author(s):

R. N. Ibbett ◽

N. P. Topham

Keyword(s):

Array Processor ◽

Processor Architecture

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A Speed-Optimized Systolic Array Processor Architecture for Spatio-Temporal 2-D IIR Broadband Beam Filters

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2008.918214 ◽

2008 ◽

Vol 55 (7) ◽

pp. 1953-1966 ◽

Author(s):

H.L.P. Arjuna Madanayake ◽

L.T. Bruton

Keyword(s):

Systolic Array ◽

Array Processor ◽

Processor Architecture ◽

Spatio Temporal

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A reconfigurable linear array processor architecture for data parallel and computation intensive applications

2011 9th IEEE International Conference on ASIC ◽

10.1109/asicon.2011.6157322 ◽

2011 ◽

Author(s):

Yucheng Liu ◽

Jing Xie ◽

Zhigang Mao

Keyword(s):

Linear Array ◽

Array Processor ◽

Processor Architecture ◽

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New systolic array processor architecture for simultaneous discrete convolution of an image plane with multiple filter coefficient sets

Journal of Electronic Imaging ◽

10.1117/1.2710469 ◽

2007 ◽

Vol 16 (1) ◽

pp. 013014

Author(s):

Albert T. Wong

Keyword(s):

Systolic Array ◽

Image Plane ◽

Array Processor ◽

Processor Architecture ◽

Filter Coefficient ◽

Discrete Convolution

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A fine-grain asynchronous VLSI cellular array processor architecture

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems ◽

10.1109/iscas.1995.519945 ◽

2002 ◽

Author(s):

G. Privat ◽

F. Robin ◽

M. Renaudin ◽

B. El Hassan

Keyword(s):

Array Processor ◽

Processor Architecture ◽

Cellular Array ◽

Asynchronous Vlsi

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A ring array processor architecture for highly parallel dynamic time warping

IEEE Transactions on Acoustics Speech and Signal Processing ◽

10.1109/tassp.1986.1164925 ◽

1986 ◽

Vol 34 (5) ◽

pp. 1310-1318 ◽

Author(s):

J. Takahashi ◽

S. Hattori ◽

T. Kimura ◽

A. Iwata

Keyword(s):

Dynamic Time Warping ◽

Array Processor ◽

Processor Architecture ◽

Time Warping ◽

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Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs

Proceedings 20th IEEE International Parallel & Distributed Processing Symposium ◽

10.1109/ipdps.2006.1639474 ◽

2006 ◽

Author(s):

P.D. Michailidis ◽

K.G. Margaritis

Keyword(s):

String Matching ◽

Approximate String Matching ◽

Array Processor ◽

Processor Architecture

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Array Processor Architecture

Computer ◽

10.1109/c-m.1981.220592 ◽

1981 ◽

Vol 14 (9) ◽

pp. 8-9 ◽

Author(s):

D.J. Theis

Keyword(s):

Array Processor ◽

Processor Architecture

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MESH-ARRAY PROCESSOR ARCHITECTURE FOR BEAM FORMING RADAR PROCESSING

Massively Parallel Processing Applications and Development ◽

10.1016/b978-0-444-81784-6.50080-4 ◽

1994 ◽

pp. 653-663 ◽

Author(s):

Michel CHARRIER ◽

Nicolas SERAN ◽

Dominique SURIN ◽

Alain THURM

Keyword(s):

Beam Forming ◽

Array Processor ◽

Processor Architecture

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MapA: An array processor architecture for neural networks

New Trends in Neural Computation - Lecture Notes in Computer Science ◽

10.1007/3-540-56798-4_184 ◽

1993 ◽

pp. 432-440

Author(s):

J. Ortega ◽

F. J. Pelayo ◽

A. Prieto ◽

B. Pino ◽

C. G. Puntonet

Keyword(s):

Neural Networks ◽

Array Processor ◽

Processor Architecture

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