A Processor Architecture Designed to Faciliate the Safety Certification of Hard Real Time Systems
Keyword(s):
1991 ◽
Vol 32
(1-5)
◽
pp. 111-118
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Keyword(s):
2004 ◽
Vol 30
(7)
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pp. 471-489
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2007 ◽
Vol 73
(2)
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pp. 207-224
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A Parallelization Approach for Hard Real-Time Systems and Its Application on Two Industrial Programs
2016 ◽
Vol 44
(6)
◽
pp. 1296-1336
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