A Processor Architecture Designed to Faciliate the Safety Certification of Hard Real Time Systems

Safe Comp 96 ◽  
1997 ◽  
pp. 61-70
Author(s):  
Hans-Peter Meske ◽  
Wolfgang A. Halang
1998 ◽  
Author(s):  
M. Rogosin ◽  
M. Zimmerman ◽  
N. Nachiappan

2007 ◽  
Vol 73 (2) ◽  
pp. 207-224 ◽  
Author(s):  
Ernesto Wandeler ◽  
Lothar Thiele

2016 ◽  
Vol 44 (6) ◽  
pp. 1296-1336 ◽  
Author(s):  
Martin Frieb ◽  
Ralf Jahr ◽  
Haluk Ozaktas ◽  
Andreas Hugl ◽  
Hans Regler ◽  
...  

2021 ◽  
Author(s):  
Gabriella D'Andrea ◽  
Giacomo Valente ◽  
Luigi Pomante ◽  
Tania Di Mascio

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