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A New Multi-Processor Architecture for Parallel Lazy Cyclic Reference Counting
17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'05)
◽
10.1109/cahpc.2005.6
◽
2006
◽
Author(s):
R.D. Lins
Keyword(s):
Processor Architecture
◽
Reference Counting
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Cited By
References
An Efficient Multi-processor Architecture for Parallel Cyclic Reference Counting
Lecture Notes in Computer Science - High Performance Computing for Computational Science — VECPAR 2002
◽
10.1007/3-540-36569-9_44
◽
2003
◽
pp. 650-663
◽
Cited By ~ 1
Author(s):
Rafael Dueire Lins
Keyword(s):
Processor Architecture
◽
Reference Counting
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Customising a processor architecture for multimedia applications
Electronic Systems and Software
◽
10.1049/ess:20030406
◽
2003
◽
Vol 1
(4)
◽
pp. 29-33
◽
Cited By ~ 1
Author(s):
H. Eichel
Keyword(s):
Multimedia Applications
◽
Processor Architecture
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Dusty caches for reference counting garbage collection
ACM SIGARCH Computer Architecture News
◽
10.1145/1147349.1147353
◽
2006
◽
Vol 34
(1)
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pp. 3-10
◽
Cited By ~ 1
Author(s):
Scott Friedman
◽
Praveen Krishnamurthy
◽
Roger Chamberlain
◽
Ron K. Cytron
◽
Jason E. Fritts
Keyword(s):
Garbage Collection
◽
Reference Counting
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Parallelized Hardware Rough Set Processor Architecture in FPGA for Core Calculation in Big Datasets
2020 16th International Conference on Control, Automation, Robotics and Vision (ICARCV)
◽
10.1109/icarcv50220.2020.9305402
◽
2020
◽
Author(s):
Maciej Kopczynski
◽
Tomasz Grzes
Keyword(s):
Rough Set
◽
Processor Architecture
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Towards Efficient Superconducting Quantum Processor Architecture Design
Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems
◽
10.1145/3373376.3378500
◽
2020
◽
Cited By ~ 4
Author(s):
Gushu Li
◽
Yufei Ding
◽
Yuan Xie
Keyword(s):
Architecture Design
◽
Processor Architecture
◽
Quantum Processor
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The space cost of lazy reference counting
ACM SIGPLAN Notices
◽
10.1145/982962.964019
◽
2004
◽
Vol 39
(1)
◽
pp. 210-219
◽
Cited By ~ 2
Author(s):
Hans-J. Boehm
Keyword(s):
Space Cost
◽
Reference Counting
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How to make your own processor architecture (review of Processor Design: System-on-Chip Computing for ASICs and FPGAs by Nurmi, J., Ed.; 2007) [Book reviews]
IEEE Design & Test of Computers
◽
10.1109/mdt.2008.14
◽
2008
◽
Vol 25
(1)
◽
pp. 96-98
Author(s):
Scott Davidson
Keyword(s):
System On Chip
◽
Design System
◽
Processor Architecture
◽
Processor Design
◽
On Chip
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QrnPro: New Processor Architecture for Accelerating Quran Applications
2013 Taibah University International Conference on Advances in Information Technology for the Holy Quran and Its Sciences
◽
10.1109/nooric.2013.89
◽
2013
◽
Cited By ~ 1
Author(s):
Mostafa I. Soliman
Keyword(s):
Processor Architecture
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Job Scheduling in Multi Processor Architecture Using Genetic Algorithm
2007 Innovations in Information Technologies (IIT)
◽
10.1109/iit.2007.4430439
◽
2007
◽
Cited By ~ 6
Author(s):
Elnaz Zafarani Moattar
◽
Amir Masoud Rahmani
◽
Mohammad Reza Feizi Derakhshi
Keyword(s):
Genetic Algorithm
◽
Job Scheduling
◽
Processor Architecture
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MASA: a multithreaded processor architecture for parallel symbolic computing
[1988] The 15th Annual International Symposium on Computer Architecture. Conference Proceedings
◽
10.1109/isca.1988.5255
◽
2003
◽
Cited By ~ 46
Author(s):
R.H. Halstead
◽
T. Fujita
Keyword(s):
Processor Architecture
◽
Symbolic Computing
◽
Multithreaded Processor
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