High Throughput FPGA Implementation for regular Non-Surjective Finite Alphabet Iterative Decoders

2017 IEEE International Conference on Communications Workshops (ICC Workshops) ◽

10.1109/iccw.2017.7962783 ◽

2017 ◽

Author(s):

Thien Truong Nguyen-Ly ◽

Valentin Savin ◽

Xavier Popon ◽

David Declercq

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Finite Alphabet ◽

Iterative Decoders

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FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold

2010 NASA/ESA Conference on Adaptive Hardware and Systems ◽

10.1109/ahs.2010.5546236 ◽

2010 ◽

Author(s):

Xiang Wu ◽

John S. Thompson

Keyword(s):

High Throughput ◽

Mimo Systems ◽

Fpga Implementation ◽

Singular Value ◽

Sphere Decoder ◽

Smallest Singular Value

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FPGA Implementation of Decoder Architectures for High Throughput Irregular LDPC Codes

Indian Journal of Science and Technology ◽

10.17485/ijst/2016/v9i48/97269 ◽

2016 ◽

Vol 9 (48) ◽

Author(s):

Sandeep Kakde ◽

Atish Khobragade ◽

M. D. Ekbal Husain

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Irregular Ldpc Codes

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Finite alphabet iterative decoders robust to faulty hardware: Analysis and selection

2014 8th International Symposium on Turbo Codes and Iterative Information Processing (ISTC) ◽

10.1109/istc.2014.6955095 ◽

2014 ◽

Author(s):

Elsa Dupraz ◽

David Declercq ◽

Bane Vasic ◽

Valentin Savin

Keyword(s):

Finite Alphabet ◽

Iterative Decoders

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A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2019.2936260 ◽

2020 ◽

Vol 28 (1) ◽

pp. 101-114 ◽

Author(s):

Jin Woo Park ◽

Hyokeun Lee ◽

Boyeal Kim ◽

Dong-Goo Kang ◽

Seung Oh Jin ◽

...

Keyword(s):

Real Time ◽

High Throughput ◽

Low Cost ◽

Fpga Implementation ◽

Video Enhancement ◽

Retinex Algorithm

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A WiMAX/LTE compliant FPGA implementation of a high-throughput low-complexity 4×4 64-QAM soft MIMO receiver

2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers ◽

10.1109/acssc.2010.5757541 ◽

2010 ◽

Author(s):

Vadim Smolyakov ◽

Dimpesh Patel ◽

Mahdi Shabany ◽

P. Glenn Gulak

Keyword(s):

High Throughput ◽

Low Complexity ◽

Fpga Implementation

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High-Throughput FPGA Implementation of QR Decomposition

IEEE Transactions on Circuits & Systems II Express Briefs ◽

10.1109/tcsii.2015.2435753 ◽

2015 ◽

Vol 62 (9) ◽

pp. 861-865 ◽

Author(s):

Sergio D. Munoz ◽

Javier Hormigo

Keyword(s):

High Throughput ◽

Qr Decomposition ◽

Fpga Implementation

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Analysis and Design of Finite Alphabet Iterative Decoders Robust to Faulty Hardware

IEEE Transactions on Communications ◽

10.1109/tcomm.2015.2452259 ◽

2015 ◽

Vol 63 (8) ◽

pp. 2797-2809 ◽

Author(s):

Elsa Dupraz ◽

David Declercq ◽

Bane Vasic ◽

Valentin Savin

Keyword(s):

Finite Alphabet ◽

Iterative Decoders ◽

Analysis And Design

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Finite alphabet iterative decoders approaching maximum likelihood performance on the Binary Symmetric Channel

2012 Information Theory and Applications Workshop ◽

10.1109/ita.2012.6181824 ◽

2012 ◽

Author(s):

David Declercq ◽

Bane Vasic ◽

Shiva K. Planjery ◽

Erbao Li

Keyword(s):

Maximum Likelihood ◽

Finite Alphabet ◽

Binary Symmetric Channel ◽

Iterative Decoders ◽

Symmetric Channel

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An algorithmic transformation for FPGA implementation of high throughput filters

2011 7th International Conference on Emerging Technologies ◽

10.1109/icet.2011.6048450 ◽

2011 ◽

Author(s):

Hamid M. Kamboh ◽

Shoab A. Khan

Keyword(s):

High Throughput ◽

Fpga Implementation ◽

Algorithmic Transformation

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Architecture and FPGA-implementation of a high throughput K+-Best detector

2011 Design, Automation & Test in Europe ◽

10.1109/date.2011.5763049 ◽

2011 ◽

Author(s):

N Heidmann ◽

T Wiegand ◽

S Paul

Keyword(s):

High Throughput ◽

Fpga Implementation

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