ScienceGate
Advanced Search
Author Search
Journal Finder
Blog
Sign in / Sign up
ScienceGate
Search
Author Search
Journal Finder
Blog
Sign in / Sign up
A high-level data path allocation algorithm based on BIST testability metrics
The 14th International Conference on Microelectronics,
◽
10.1109/icm-02.2002.1161537
◽
2004
◽
Author(s):
L. Tianruo Yang
◽
J. Muzio
Keyword(s):
Data Path
◽
Allocation Algorithm
◽
Level Data
◽
High Level
Download Full-text
Related Documents
Cited By
References
High-level data path synthesis for built-in self-test designs
2001 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing (IEEE Cat. No.01CH37233)
◽
10.1109/pacrim.2001.953577
◽
2002
◽
Author(s):
Laurence Tainruo Yang
◽
J. Muzio
Keyword(s):
Data Path
◽
Level Data
◽
Self Test
◽
Built In Self Test
◽
High Level
◽
Path Synthesis
Download Full-text
A Verifiable High Level Data Path Synthesis Framework
2012 15th Euromicro Conference on Digital System Design
◽
10.1109/dsd.2012.16
◽
2012
◽
Author(s):
Gorker Alp Malazgirt
◽
Ender Culha
◽
Alper Sen
◽
Faik Baskaya
◽
Arda Yurdakul
Keyword(s):
Data Path
◽
Level Data
◽
High Level
◽
Path Synthesis
Download Full-text
Testability analysis in high level data path synthesis
Journal of Electronic Testing
◽
10.1007/bf00971939
◽
1993
◽
Vol 4
(1)
◽
pp. 43-56
◽
Cited By ~ 16
Author(s):
Johannes Steensma
◽
Werner Geurts
◽
Francky Catthoor
◽
Hugo De Man
Keyword(s):
Data Path
◽
Testability Analysis
◽
Level Data
◽
High Level
◽
Path Synthesis
Download Full-text
The High-Level Data-Path Mapping Script
Accelerator Data-Path Synthesis for High-Throughput Signal Processing Applications
◽
10.1007/978-1-4419-8720-4_5
◽
1997
◽
pp. 63-85
Author(s):
Werner Geurts
◽
Francky Catthoor
◽
Serge Vernalde
◽
Hugo de Man
Keyword(s):
Data Path
◽
Level Data
◽
High Level
Download Full-text
SEU-Aware High-Level Data Path Synthesis and Layout Generation on SRAM-Based FPGAs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
◽
10.1109/tcad.2011.2106851
◽
2011
◽
Vol 30
(6)
◽
pp. 829-840
◽
Cited By ~ 6
Author(s):
Shahin Golshan
◽
Hessam Kooti
◽
Elaheh Bozorgzadeh
Keyword(s):
Data Path
◽
Level Data
◽
Layout Generation
◽
High Level
◽
Path Synthesis
Download Full-text
High-level data link control (HDLC) procedures
10.3403/00150576
◽
1985
◽
Keyword(s):
Data Link
◽
Level Data
◽
High Level
Download Full-text
High-level data link control (HDLC) procedures
10.3403/00150552
◽
1985
◽
Keyword(s):
Data Link
◽
Level Data
◽
High Level
Download Full-text
High-level data link control (HDLC) procedures
10.3403/00150525
◽
1985
◽
Keyword(s):
Data Link
◽
Level Data
◽
High Level
Download Full-text
High-level data link control (HDLC) procedures
10.3403/00216162
◽
1990
◽
Keyword(s):
Data Link
◽
Level Data
◽
High Level
Download Full-text
High-level data link control (HDLC) procedures
10.3403/00209615
◽
1990
◽
Keyword(s):
Data Link
◽
Level Data
◽
High Level
Download Full-text
Sign in / Sign up
Close
Export Citation Format
Close
Share Document
Close