Extracting, specifying and predicting software system properties in component based real-time embedded software development

Author(s):  
Ji Eun Kim ◽  
Oliver Rogalla ◽  
Simon Kramer ◽  
Arne Hamann
Author(s):  
Gabriel de Souza Pereira Moreira ◽  
Denis Ávila Montini ◽  
Daniela América da Silva ◽  
Felipe Rafael Motta Cardoso ◽  
Luiz Alberto Vieira Dias ◽  
...  

Author(s):  
Link C. Jaw ◽  
Dong N. Wu

Control or monitoring logic development typically follows the process of model building, analysis, design, and (nonlinear) simulation. After the logic is verified in computer simulation, the corresponding embedded control or monitoring code is generated and downloaded to the controller’s microprocessor. Then a hardware-in-the-loop (HITL) simulation is conducted to verify the logic and the controller interface. Although this process is well established, the requirements for real-time simulation and hardware/software integration often pose a high risk in the embedded software development process. This risk can be mitigated by the code-in-the-loop (CITL) simulation methodology presented in this paper. This CITL simulation methodology has been applied to a software update of the full-authority digital engine control (FADEC) unit for the Honeywell (formerly AlliedSignal) Universal Jet Air Starter Unit (UNIJASU), which is a gas turbine engine packaged as an auxiliary power unit to jump start aircraft engines on the ground. The CITL simulation, although non-real time, successfully predicted the effects of several control logic options and facilitated the implementation of software update. Hence we recommend that the CITL simulation be incorporated in the embedded control software development process to shorten software update time. We further recommend that CITL be a necessary step in the process if HITL simulation is not feasible.


2010 ◽  
Vol 130 (3) ◽  
pp. 496-502
Author(s):  
Yoshiyuki Anan ◽  
Toyoshiro Nakashima ◽  
Kazunori Iwata ◽  
Hiroshi Yonemitsu ◽  
Tetsu Yoshioka ◽  
...  

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