Using Formal Verification in Real-Time Embedded Software Development

2005 ◽  
Author(s):  
Amar Bouali ◽  
Bernard Dion ◽  
Kosuke Konishi
Keyword(s):  
Software Development ◽  
Formal Verification ◽  
Real Time ◽  
Embedded Software

Design Patterns Reuse for Real Time Embedded Software Development

2009 ◽  
Author(s):  
Gabriel de Souza Pereira Moreira ◽  
Denis Ávila Montini ◽  
Daniela América da Silva ◽  
Felipe Rafael Motta Cardoso ◽  
Luiz Alberto Vieira Dias ◽  
...  
Keyword(s):  
Software Development ◽  
Real Time ◽  
Design Patterns ◽  
Embedded Software

A Comparative Research between SCRUM and RUP Using Real Time Embedded Software Development

2013 ◽  
Author(s):  
Strauss Cunha Carvalho ◽  
Felipe Rafael Motta Cardoso ◽  
Adilson Marques Da Cunha ◽  
Luiz Paulo Zanetti
Keyword(s):  
Software Development ◽  
Real Time ◽  
Comparative Research ◽  
Embedded Software

Code-in-the-Loop Simulation for Embedded Software Development

2001 ◽  
Author(s):  
Link C. Jaw ◽  
Dong N. Wu
Keyword(s):  
Software Development ◽  
Real Time ◽  
Development Process ◽  
Embedded Software ◽  
Software Development Process ◽  
Control Logic ◽  
Embedded Control ◽  
Nonlinear Simulation ◽  
Software Update ◽  
Simulation Methodology

Control or monitoring logic development typically follows the process of model building, analysis, design, and (nonlinear) simulation. After the logic is verified in computer simulation, the corresponding embedded control or monitoring code is generated and downloaded to the controller’s microprocessor. Then a hardware-in-the-loop (HITL) simulation is conducted to verify the logic and the controller interface. Although this process is well established, the requirements for real-time simulation and hardware/software integration often pose a high risk in the embedded software development process. This risk can be mitigated by the code-in-the-loop (CITL) simulation methodology presented in this paper. This CITL simulation methodology has been applied to a software update of the full-authority digital engine control (FADEC) unit for the Honeywell (formerly AlliedSignal) Universal Jet Air Starter Unit (UNIJASU), which is a gas turbine engine packaged as an auxiliary power unit to jump start aircraft engines on the ground. The CITL simulation, although non-real time, successfully predicted the effects of several control logic options and facilitated the implementation of software update. Hence we recommend that the CITL simulation be incorporated in the embedded control software development process to shorten software update time. We further recommend that CITL be a necessary step in the process if HITL simulation is not feasible.

Application of Error Estimating Model to Control Quality in Embedded Software Development

2010 ◽  
Vol 130 (3) ◽  
pp. 496-502
Author(s):  
Yoshiyuki Anan ◽  
Toyoshiro Nakashima ◽  
Kazunori Iwata ◽  
Hiroshi Yonemitsu ◽  
Tetsu Yoshioka ◽  
...  
Keyword(s):  
Software Development ◽  
Embedded Software ◽  
Control Quality
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