An SRAM-free HEVC Deblocking Filter VLSI Architecture for 8K Application

2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict.2018.8565040 ◽

2018 ◽

Author(s):

Genwei Tang ◽

Xiaoyang Zeng ◽

Yibo Fan

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter

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Configurable VLSI Architecture for Deblocking Filter in H.264/AVC

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2008.2000516 ◽

2008 ◽

Vol 16 (8) ◽

pp. 1072-1082 ◽

Author(s):

Chung-Ming Chen ◽

Chung-Ho Chen

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter

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Deblocking Filter Based on Edge-Preserving Algorithm And an Efficient VLSI Architecture

The Journal of Korean Institute of Communications and Information Sciences ◽

10.7840/kics.2011.36c.11.662 ◽

2011 ◽

Vol 36 (11C) ◽

pp. 662-672

Author(s):

Truong Quang Vinh ◽

Ji-Hoon Kim ◽

Young-Chul Kim

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter ◽

Edge Preserving

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Small area VLSI architecture for deblocking filter of HEVC

2015 IEEE 5th International Conference on Consumer Electronics - Berlin (ICCE-Berlin) ◽

10.1109/icce-berlin.2015.7391262 ◽

2015 ◽

Author(s):

Masashi Tomida ◽

Yutaro Tanida ◽

Tian Song ◽

Takashi Shimamoto

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter

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The VLSI Architecture of a Highly Efficient Deblocking Filter for HEVC Systems

IEEE Transactions on Circuits and Systems for Video Technology ◽

10.1109/tcsvt.2016.2515306 ◽

2017 ◽

Vol 27 (5) ◽

pp. 1091-1103 ◽

Author(s):

Po-Kai Hsu ◽

Chung-An Shen

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter ◽

Highly Efficient

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A high-throughput deblocking filter VLSI architecture for HEVC

2015 Visual Communications and Image Processing (VCIP) ◽

10.1109/vcip.2015.7457824 ◽

2015 ◽

Author(s):

Wei Zhou ◽

Jingzhi Zhang ◽

Xin Zhou ◽

Tongqing Liu

Keyword(s):

High Throughput ◽

Vlsi Architecture ◽

Deblocking Filter

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A high-throughput VLSI architecture for deblocking filter in HEVC

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) ◽

10.1109/iscas.2013.6571936 ◽

2013 ◽

Author(s):

Weiwei Shen ◽

Qing Shang ◽

Sha Shen ◽

Yibo Fan ◽

Xiaoyang Zeng

Keyword(s):

High Throughput ◽

Vlsi Architecture ◽

Deblocking Filter

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A high-throughput HEVC deblocking filter VLSI architecture for 8k×4k application

2015 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2015.7168706 ◽

2015 ◽

Author(s):

Wei Cheng ◽

Yibo Fan ◽

YanHeng Lu ◽

Yize Jin ◽

Xiaoyang Zeng

Keyword(s):

High Throughput ◽

Vlsi Architecture ◽

Deblocking Filter

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A High-Throughput and Multi-Parallel VLSI Architecture for HEVC Deblocking Filter

IEEE Transactions on Multimedia ◽

10.1109/tmm.2016.2537217 ◽

2016 ◽

Vol 18 (6) ◽

pp. 1034-1047 ◽

Author(s):

Wei Zhou ◽

Jingzhi Zhang ◽

Xin Zhou ◽

Zhenyu Liu ◽

Xiaoxiang Liu

Keyword(s):

High Throughput ◽

Vlsi Architecture ◽

Deblocking Filter

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A pipelined VLSI architecture for Sample Adaptive Offset (SAO) filter and deblocking filter of HEVC

IEICE Electronics Express ◽

10.1587/elex.10.20130272 ◽

2013 ◽

Vol 10 (11) ◽

pp. 20130272-20130272 ◽

Author(s):

Sha Shen ◽

Weiwei Shen ◽

Yibo Fan ◽

Xiaoyang Zeng

Keyword(s):

Vlsi Architecture ◽

Deblocking Filter

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A 64Cycles/MB, Luma-Chroma Parallelized H.264/AVC Deblocking Filter for 4K × 2K Applications

IEICE Transactions on Electronics ◽

10.1587/transele.e95.c.441 ◽

2012 ◽

Vol E95-C (4) ◽

pp. 441-446 ◽

Author(s):

Weiwei SHEN ◽

Yibo FAN ◽

Xiaoyang ZENG

Keyword(s):

Deblocking Filter

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