A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz
1998 ◽
Vol 33
(12)
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pp. 1879-1886
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2011 ◽
Vol E94-C
(8)
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pp. 1340-1343
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2002 ◽
Vol 37
(7)
◽
pp. 809-816
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2012 ◽
Vol E95.C
(6)
◽
pp. 1017-1025
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2009 ◽
Vol 2009
(8)
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pp. 20-26
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