An 11,424 gate-count zero-overhead dynamic optically reconfigurable gate array VLSI

2007 IEEE International SOC Conference ◽

10.1109/socc.2007.4545430 ◽

2007 ◽

Author(s):

Minoru Watanabe

Keyword(s):

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A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35μ CMOS technology

Asia and South Pacific Conference on Design Automation, 2006. ◽

10.1109/aspdac.2006.1594660 ◽

2006 ◽

Author(s):

M. Watanabe ◽

F. Kobayashi

Keyword(s):

Cmos Technology ◽

Vlsi Chip ◽

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Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI

Lecture Notes in Computer Science - Embedded Computer Systems: Architectures, Modeling, and Simulation ◽

10.1007/978-3-642-03138-0_15 ◽

2009 ◽

pp. 139-148

Author(s):

Shinichi Kato ◽

Minoru Watanabe

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A 1,632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

Reconfigurable Computing: Architectures and Applications - Lecture Notes in Computer Science ◽

10.1007/11802839_35 ◽

2006 ◽

pp. 268-273 ◽

Author(s):

Minoru Watanabe ◽

Fuminori Kobayashi

Keyword(s):

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A 16,000-gate-count Optically Reconfigurable Gate Array in a standard 0.35μ m CMOS Technology

2005 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2005.1464812 ◽

2005 ◽

Author(s):

M. Watanabe ◽

F. Kobayashi

Keyword(s):

Cmos Technology ◽

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A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35μm CMOS technology

Asia and South Pacific Conference on Design Automation, 2006. ◽

10.1145/1118299.1118330 ◽

2006 ◽

Author(s):

Minoru Watanabe ◽

Fuminori Kobayashi

Keyword(s):

Cmos Technology ◽

Vlsi Chip ◽

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Optical configuration of an 11,424 gate-count dynamic optically reconfigurable gate array using a VCSEL

2008 IEEE/SICE International Symposium on System Integration ◽

10.1109/si.2008.4770433 ◽

2008 ◽

Author(s):

Daisaku Seto ◽

Minoru Watanabe

Keyword(s):

Optical Configuration ◽

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A 51,272-gate-count Dynamic Optically Reconfigurable Gate Array in a standard 0.35 μm CMOS Technology

10.7567/ssdm.2005.e-4-6 ◽

2005 ◽

Author(s):

Minoru Watanabe ◽

Fuminori Kobayashi

Keyword(s):

Cmos Technology ◽

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A 0.35um CMOS 1,632-gate-count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI

2007 Asia and South Pacific Design Automation Conference ◽

10.1109/aspdac.2007.357972 ◽

2007 ◽

Author(s):

Minoru Watanabe ◽

Fuminori Kobayashi

Keyword(s):

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An 11,424 gate-count dynamic optically reconfigurable gate array with a photodiode memory architecture

2009 Asia and South Pacific Design Automation Conference ◽

10.1109/aspdac.2009.4796460 ◽

2009 ◽

Author(s):

Daisaku Seto ◽

Minoru Watanabe

Keyword(s):

Memory Architecture ◽

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Heat Diffusion in an Optical Logic Gate Array on Silicon-on-Sapphire

Journal de Physique III ◽

10.1051/jp3:1997152 ◽

1997 ◽

Vol 7 (3) ◽

pp. 739-748

Author(s):

H. Gualous ◽

A. Koster ◽

D. Pascal ◽

S. Laval

Keyword(s):

Heat Diffusion ◽

Optical Logic ◽

Optical Logic Gate ◽

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