A low area FIR filter for FPGA implementation

2011 34th International Conference on Telecommunications and Signal Processing (TSP) ◽

10.1109/tsp.2011.6043675 ◽

2011 ◽

Author(s):

Catalin Damian ◽

Eduard Lunca

Keyword(s):

Fpga Implementation ◽

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Design of FIR Filter for Efficient FPGA Implementation

i-manager’s Journal on Electronics Engineering ◽

10.26634/jele.5.3.3392 ◽

2015 ◽

Vol 5 (3) ◽

pp. 1-10

Author(s):

S. V. Padmajarani ◽

◽

M. Muralidhar ◽

Keyword(s):

Fpga Implementation

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Design, FPGA implementation and statistical analysis of a high-speed and low-area TRNG based on an AES s-box post-processing technique

ISA Transactions ◽

10.1016/j.isatra.2021.01.054 ◽

2021 ◽

Author(s):

Ali Murat Gari̇pcan ◽

Ebubekir Erdem

Keyword(s):

Statistical Analysis ◽

Processing Technique ◽

Fpga Implementation ◽

Post Processing ◽

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A Low Area FPGA Implementation of Reversible Gate Encryption with Heterogeneous Key Generation

Circuits Systems and Signal Processing ◽

10.1007/s00034-021-01649-1 ◽

2021 ◽

Author(s):

K. Saranya ◽

K. N. Vijeyakumar

Keyword(s):

Fpga Implementation ◽

Key Generation ◽

Low Area ◽

Reversible Gate

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Synthesis of FIR Filter using ADC-DAC: A FPGA Implementation

2019 IEEE International Conference on Clean Energy and Energy Efficient Electronics Circuit for Sustainable Development (INCCES) ◽

10.1109/incces47820.2019.9167696 ◽

2019 ◽

Author(s):

R. Raja Sudharsan

Keyword(s):

Fpga Implementation

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FPGA Implementation of Reconfigurable FIR Filter using Carry Bypass Adder

IJARCCE ◽

10.17148/ijarcce.2018.7119 ◽

2018 ◽

Vol 7 (11) ◽

pp. 46-51

Author(s):

Shaik Rizwan ◽

Shaik Rasool

Keyword(s):

Fpga Implementation

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FPGA implementation of efficient FIR Filter with quantized fixedpoint coefficients

2013 International Conference on Emerging Trends in Communication, Control, Signal Processing and Computing Applications (C2SPCA) ◽

10.1109/c2spca.2013.6749406 ◽

2013 ◽

Author(s):

Santosh Bhalke ◽

Manjula B.M. ◽

Chirag Sharma

Keyword(s):

Fpga Implementation

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FPGA implementation of a FIR filter using residue arithmetic

Proceedings of the IEEE 1996 National Aerospace and Electronics Conference NAECON 1996 ◽

10.1109/naecon.1996.517659 ◽

2002 ◽

Author(s):

G. Loonawat ◽

R.E. Siferd

Keyword(s):

Fpga Implementation ◽

Residue Arithmetic

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Low area memory-free FPGA implementation of the AES algorithm

22nd International Conference on Field Programmable Logic and Applications (FPL) ◽

10.1109/fpl.2012.6339250 ◽

2012 ◽

Author(s):

Junfeng Chu ◽

Mohammed Benaissa

Keyword(s):

Fpga Implementation ◽

Low Area ◽

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The design of FIR filter base on improved DA algorithm and its FPGA implementation

2010 The 2nd International Conference on Computer and Automation Engineering (ICCAE) ◽

10.1109/iccae.2010.5451677 ◽

2010 ◽

Author(s):

Shunwen Xiao ◽

Yajun Chen ◽

Peng Luo

Keyword(s):

Fpga Implementation ◽

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Low Area FPGA Implementation of DROM-CSLA-QTL Architecture for Cryptographic Applications

International Journal of Network Security & Its Applications ◽

10.5121/ijnsa.2018.10303 ◽

2018 ◽

Vol 10 (3) ◽

pp. 25-37 ◽

Author(s):

Shailaja A ◽

Krishnamurthy G N

Keyword(s):

Fpga Implementation ◽

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