Field programmable gate arrays (FPGAs) are finding increasing number of applications in high integrity safety critical systems of aerospace and defence industry. Though FPGA design goes through various development processes, it is widely observed that the critical errors are observed in the final stages of development, thereby impacting time and cost. The risk of failure in complex embedded systems is overcome by using the independent verification and validation (IV&V) technique. Independent verification and validation (IV&V) of FPGA-based design is essential for evaluating the correctness, quality, and safety of the airborne embedded systems throughout the development life cycle and provides early detection and identification of risk elements. The process of IV&V and its planning needs to be initiated early in the development life cycle. This chapter describes the IV&V methodology for FPGA-based design during the development life cycle along with the certification process.
Transition of Independent Verification and Validation Activity and Refined Concept at the Mature Age
