BDD-based Bounded Model Checking for Temporal Properties of 1-Safe Petri Nets

2011 ◽  
Vol 109 (3) ◽  
pp. 305-321 ◽  
Author(s):  
Artur Męski ◽  
Wojciech Penczek ◽  
Agata Półrola
2020 ◽  
Vol E103.D (3) ◽  
pp. 702-705
Author(s):  
Nao IGAWA ◽  
Tomoyuki YOKOGAWA ◽  
Sousuke AMASAKI ◽  
Masafumi KONDO ◽  
Yoichiro SATO ◽  
...  

Author(s):  
Armin Biere

One of the most important industrial applications of SAT is currently Bounded Model Checking (BMC). This technique is typically used for formal hardware verification in the context of Electronic Design Automation. But BMC has successfully been applied to many other domains as well. In practice, BMC is mainly used for falsification, which is concerned with violations of temporal properties. In addition, a considerable part of this chapter discusses complete extensions, including k-induction and interpolation. These extensions also allow to prove properties.


2015 ◽  
Vol 12 (2) ◽  
pp. 20141112-20141112 ◽  
Author(s):  
Tomoyuki Yokogawa ◽  
Masafumi Kondo ◽  
Hisashi Miyazaki ◽  
Sousuke Amasaki ◽  
Yoichiro Sato ◽  
...  

2012 ◽  
Vol 23 (7) ◽  
pp. 1656-1668 ◽  
Author(s):  
Cong-Hua ZHOU ◽  
Zhi-Feng LIU ◽  
Chang-Da WANG

Author(s):  
Adrian Beer ◽  
Stephan Heidinger ◽  
Uwe Kühne ◽  
Florian Leitner-Fischer ◽  
Stefan Leue

Sign in / Sign up

Export Citation Format

Share Document