Solid-State Fault Current Limiter based on Magnetic Turn off Principle

2014 ◽  
Vol 4 (2) ◽  
pp. 95-101 ◽  
Author(s):  
Ji-Seong Kang ◽  
Young-Hyun Moon
Author(s):  
Ronald Warzoha ◽  
Patrick Kirby ◽  
Amy Fleischer ◽  
Mahesh Gandhi ◽  
Ashok Sundaram

This paper presents the results of thermal modeling of a unique 69 kV 3000A Solid State Fault Current Limiter (SSFCL) developed by Silicon Power of Malvern, PA with support of EPRI. The development of the Solid State Fault Current Limiter is expected to modernize power distribution systems through the use of small-scale solid-state power devices. The use of this new design is expected to increase reliability and functionality while reducing footprint. However, as the footprint is reduced, the heat flux for the system is increased, leading to the significant possibility of device failure due to thermal excursions if the heat load is not properly managed. The high heat loading requires the use of aggressive thermal management in the form of liquid cooling of the electronics. This system features 288 kW of waste heat in the three phase system. The system is submerged in FR3 dielectric coolant and the desired thermal management system is liquid natural convection within the tank and shed to the ambient through an external finned array system. This project explores the feasibility of this system design.


Author(s):  
Khánh Bạch Quốc

Abstract - One of popular and effective solutions to voltage sag mitigation is the use of custom power devices (CPD) like dynamic voltage restorers (DVR). On the other hand, fault current limiter FCL) also has impacts on voltage sags caused by faults. This paper introduces a new combination between DVR and solid-state fault current limiter (SSFCL) that can further improve global performance of voltage sags due to faults in distribution system. The location of DVR-SSFCL combination is optimally selected basing on minimizing a global index - SARFIX. In optimizing DVR-SSFCL combination’s placement, various cases of parameters relating with its ratings are considered and discussed. The paper uses IEEE’s 33-bus distribution system for modeling voltage sag due to faults and DVR-SSFCL combination’s effectiveness on global voltage sag mitigation.


Author(s):  
Panbao Wang ◽  
Wei Wei ◽  
Zhiqiang Mao ◽  
Xin Hao ◽  
Wei Wang ◽  
...  

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