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A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM

2017 ◽  
Vol 70 ◽  
pp. 107-116 ◽  
Author(s):  
Deng-Shian Wang ◽  
Yu-Hsun Su ◽  
Chua-Chin Wang
Keyword(s):  
Slew Rate ◽  
Readout Circuit ◽  
Slew Rate Compensation ◽  
28 Nm

A Dynamic Leakage and Slew Rate Compensation Circuit for 40-nm CMOS Mixed-Voltage Output Buffer

2017 ◽  
Vol 25 (11) ◽  
pp. 3166-3174 ◽  
Author(s):  
Tzung-Je Lee ◽  
Tsung-Yi Tsai ◽  
Wei Lin ◽  
U-Fat Chio ◽  
Chua-Chin Wang
Keyword(s):  
Output Buffer ◽  
Slew Rate ◽  
Compensation Circuit ◽  
Voltage Output ◽  
Slew Rate Compensation

A 2×VDD output buffer with PVT detector for slew rate compensation

2013 ◽  
Vol 44 (5) ◽  
pp. 393-399 ◽  
Author(s):  
Chua-Chin Wang ◽  
Wen-Je Lu ◽  
Chih-Lin Chen ◽  
Hsin-Yuan Tseng ◽  
Ron-Chi Kuo ◽  
...  
Keyword(s):  
Output Buffer ◽  
Slew Rate ◽  
Slew Rate Compensation
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