2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)
Latest Publications

TOTAL DOCUMENTS

166

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781509043699

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Evolution of the topographical and chemical signatures of plasma-treated surfaces along the staging time pathway

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861567 ◽

2016 ◽

Author(s):

Ian Harvey Arellano ◽

Amor Zapanta

Keyword(s):

Chemical Signatures

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Fabrication process of a triple-layer stacked TSV interposer for switch matrix consisting of eight RF chips

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861564 ◽

2016 ◽

Author(s):

Wei Meng ◽

Yong Guan ◽

Qinghua Zeng ◽

Jing Chen ◽

Yufeng Jin

Keyword(s):

Fabrication Process ◽

Triple Layer

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Novel way of characterizing fracture toughness of ultra-low temperature SiN films by nanoindentation

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861475 ◽

2016 ◽

Author(s):

H. Zhang ◽

G. T. W. Goh ◽

Y. Huang

Keyword(s):

Fracture Toughness ◽

Low Temperature

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Through mold interconnects for fan-out wafer level package

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861441 ◽

2016 ◽

Cited By ~ 4

Author(s):

Soon Wee Ho ◽

Leong Ching Wai ◽

Soon Ann Sek ◽

Daniel Ismael Cereno ◽

Boon Long Lau ◽

...

Keyword(s):

Wafer Level ◽

Wafer Level Package

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Unconventional copper wirebond looping profile approach

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861508 ◽

2016 ◽

Cited By ~ 1

Author(s):

Allen M. Descartin ◽

Wei Yadong ◽

Li Jun ◽

Xu Xuesong ◽

Song Zhanbin

Keyword(s):

Profile Approach

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Low stress dielectric layers for wafer level packages to reduce wafer warpage and improve board-level temperature-cycle reliability

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861466 ◽

2016 ◽

Author(s):

James T. Huneke ◽

SweeTeck Tay

Keyword(s):

Temperature Cycle ◽

Wafer Level ◽

Dielectric Layers ◽

Board Level

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Process considerations, process challenges and manufacturing systems for roll-to-roll processing

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861568 ◽

2016 ◽

Author(s):

X. C. Shan ◽

S. H. Chen ◽

B. Salam ◽

M. B. Mohahidin ◽

J. Wei

Keyword(s):

Manufacturing Systems ◽

Roll To Roll

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Molded wafer level package evaluation and characterization

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861527 ◽

2016 ◽

Author(s):

Vito Lin ◽

Nicholas Kao ◽

Don Son Jiang

Keyword(s):

Wafer Level ◽

Wafer Level Package

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Development of UHF to 2.4GHz and 5.2GHz dual band up-conversion CMOS mixer

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861471 ◽

2016 ◽

Cited By ~ 1

Author(s):

Ryoya Miyamoto ◽

A. I. A. Galal ◽

Haruichi Kanaya

Keyword(s):

Dual Band ◽

Cmos Mixer

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Gravure printing of Ag electrodes for electroluminescent lighting

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC) ◽

10.1109/eptc.2016.7861549 ◽

2016 ◽

Cited By ~ 2

Author(s):

Vasudivan Sunappan

Keyword(s):

Gravure Printing ◽

Ag Electrodes

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2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Evolution of the topographical and chemical signatures of plasma-treated surfaces along the staging time pathway

Fabrication process of a triple-layer stacked TSV interposer for switch matrix consisting of eight RF chips

Novel way of characterizing fracture toughness of ultra-low temperature SiN films by nanoindentation

Through mold interconnects for fan-out wafer level package

Unconventional copper wirebond looping profile approach

Low stress dielectric layers for wafer level packages to reduce wafer warpage and improve board-level temperature-cycle reliability

Process considerations, process challenges and manufacturing systems for roll-to-roll processing

Molded wafer level package evaluation and characterization

Development of UHF to 2.4GHz and 5.2GHz dual band up-conversion CMOS mixer

Gravure printing of Ag electrodes for electroluminescent lighting

2016 IEEE 18th Electronics Packaging Technology Conference (EPTC)
Latest Publications