Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235)
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Published By IEEE

0818684917

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Using prediction to accelerate coherence protocols

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694773 ◽

2002 ◽

Cited By ~ 33

Author(s):

S.S. Mukherjee ◽

M.D. Hill

Keyword(s):

Coherence Protocols

Multi-level texture caching for 3D graphics hardware

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694765 ◽

2002 ◽

Cited By ~ 19

Author(s):

M. Cox ◽

N. Bhandari ◽

M. Shantz

Keyword(s):

Graphics Hardware ◽

3D Graphics ◽

Multi Level

The effect of instruction fetch bandwidth on value prediction

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694787 ◽

2002 ◽

Cited By ~ 22

Author(s):

F. Gabbay ◽

A. Mendelson

Keyword(s):

Value Prediction ◽

Instruction Fetch ◽

Fetch Bandwidth

Design choices in the SHRIMP system: an empirical study

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694792 ◽

2002 ◽

Cited By ~ 8

Author(s):

M.A. Blumrich ◽

R.D. Alpert ◽

Yuqun Chen ◽

D.W. Clark ◽

S.M. Damianakis ◽

...

Keyword(s):

Empirical Study

Increasing TLB reach using superpages backed by shadow memory

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694775 ◽

2002 ◽

Cited By ~ 29

Author(s):

M. Swanson ◽

L. Stoller ◽

J. Carter

Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694793 ◽

2002 ◽

Cited By ~ 13

Author(s):

V. Soundararajan ◽

M. Heinrich ◽

B. Verghese ◽

K. Gharachorloo ◽

A. Gupta ◽

...

Options for dynamic address translation in COMAs

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694776 ◽

2002 ◽

Cited By ~ 5

Author(s):

Xiaogang Qiu ◽

M. Dubois

Keyword(s):

Address Translation

Threaded multiple path execution

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694778 ◽

2002 ◽

Cited By ~ 38

Author(s):

S. Wallace ◽

B. Calder ◽

D.M. Tullsen

Keyword(s):

Multiple Path

Active Pages: a computation model for intelligent memory

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694774 ◽

2002 ◽

Cited By ~ 73

Author(s):

M. Oskin ◽

F.T. Chong ◽

T. Sherwood

Keyword(s):

Computation Model ◽

Intelligent Memory

Branch prediction based on universal data compression algorithms

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235) ◽

10.1109/isca.1998.694763 ◽

2002 ◽

Cited By ~ 7

Author(s):

E. Federovsky ◽

M. Feder ◽

S. Weiss

Keyword(s):

Data Compression ◽

Branch Prediction ◽

Compression Algorithms

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Using prediction to accelerate coherence protocols

Multi-level texture caching for 3D graphics hardware

The effect of instruction fetch bandwidth on value prediction

Design choices in the SHRIMP system: an empirical study

Increasing TLB reach using superpages backed by shadow memory

Flexible use of memory for replication/migration in cache-coherent DSM multiprocessors

Options for dynamic address translation in COMAs

Threaded multiple path execution

Active Pages: a computation model for intelligent memory

Branch prediction based on universal data compression algorithms

Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235)
Latest Publications