Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216)
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104

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Published By Inst. Electr. Eng. Japan

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Design consideration for 2 kV SiC-SIT

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934584 ◽

2002 ◽

Cited By ~ 1

Author(s):

H. Onose ◽

T. Yatsuo ◽

A. Watanabe ◽

T. Yokota ◽

T. Ishikawa ◽

...

Keyword(s):

Design Consideration

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Ultra-high voltage device termination using the 3D RESURF (super-junction) concept - experimental demonstration at 6.5 kV

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934573 ◽

2002 ◽

Cited By ~ 6

Author(s):

F. Udrea ◽

T. Trajkovic ◽

J. Thomson ◽

L. Coulbeck ◽

P.R. Waind ◽

...

Keyword(s):

High Voltage ◽

Experimental Demonstration ◽

Ultra High Voltage

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600 V CSTBT having ultra low on-state voltage

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934648 ◽

2002 ◽

Cited By ~ 2

Author(s):

H. Takahashi ◽

S. Aono ◽

E. Yoshida ◽

J. Moritani ◽

S. Hine

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Investigation of the gate dielectric oxidation treatment in trench gate power devices

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934629 ◽

2002 ◽

Author(s):

Ming-Jang Lin ◽

Chorng-Wei Liaw ◽

Jiun-Jye Chang ◽

Fang-Long Chang ◽

C.C.H. Hsu ◽

...

Keyword(s):

Gate Dielectric ◽

Power Devices ◽

Oxidation Treatment

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An ultra dense trench-gated power MOSFET technology using a self-aligned process

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934577 ◽

2002 ◽

Cited By ~ 4

Author(s):

Jun Zeng ◽

G. Dolny ◽

C. Kocon ◽

R. Stokes ◽

N. Kraft ◽

...

Keyword(s):

Power Mosfet

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5.5 kV normally-off low RonS 4H-SiC SEJFET

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934551 ◽

2002 ◽

Cited By ~ 2

Author(s):

K. Asano ◽

Y. Sugawara ◽

S. Ryu ◽

R. Singh ◽

J. Palmour ◽

...

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A 650 V rated RESURF-type LDMOS employing an internal clamping diode for induced bulk breakdown without EPI layer

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934626 ◽

2002 ◽

Cited By ~ 2

Author(s):

M.H. Kim ◽

J.J. Kim ◽

Y.S. Choi ◽

C.K. Jeon ◽

S.L. Kim ◽

...

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4.5 kV 4H-SiC diodes with ideal forward characteristic

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934553 ◽

2002 ◽

Cited By ~ 9

Author(s):

H. Lendenmann ◽

A. Mukhitdinov ◽

F. Dahlquist ◽

H. Bleichner ◽

M. Irwin ◽

...

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The 5/sup th/ generation highly rugged planar IGBT using sub-micron process technology

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934643 ◽

2002 ◽

Author(s):

J. Yamashita ◽

C. Yoshida ◽

C. Fujii ◽

K. Takanashi ◽

J. Moritano

Keyword(s):

Process Technology

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Recessed trench MOSFET process without critical alignments makes very high densities possible

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216) ◽

10.1109/ispsd.2001.934610 ◽

2002 ◽

Author(s):

A. Finney ◽

J. Evans ◽

P. Blair ◽

J. Earnshaw ◽

P. Jerred ◽

...

Keyword(s):

Very High

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Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Inst. Electr. Eng. Japan

Design consideration for 2 kV SiC-SIT

Ultra-high voltage device termination using the 3D RESURF (super-junction) concept - experimental demonstration at 6.5 kV

600 V CSTBT having ultra low on-state voltage

Investigation of the gate dielectric oxidation treatment in trench gate power devices

An ultra dense trench-gated power MOSFET technology using a self-aligned process

5.5 kV normally-off low RonS 4H-SiC SEJFET

A 650 V rated RESURF-type LDMOS employing an internal clamping diode for induced bulk breakdown without EPI layer

4.5 kV 4H-SiC diodes with ideal forward characteristic

The 5/sup th/ generation highly rugged planar IGBT using sub-micron process technology

Recessed trench MOSFET process without critical alignments makes very high densities possible

Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216)
Latest Publications