Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)
Latest Publications

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106

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Published By IEEE

0769500137

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FAAR: A router for field-programmable analog arrays

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745213 ◽

1999 ◽

Cited By ~ 3

Author(s):

S. Granesan ◽

R. Vemuri

Keyword(s):

Programmable Analog ◽

Field Programmable ◽

Field Programmable Analog Arrays ◽

Analog Arrays

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A VLSI architecture for on-line image decompression using GF(2/sup 8/) cellular automata

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745209 ◽

1999 ◽

Author(s):

K. Paul ◽

P. Dutta ◽

D. Roy Choudhury ◽

P.K. Nandi ◽

P. Pal Chaudhuri

Keyword(s):

Cellular Automata ◽

Vlsi Architecture ◽

Line Image ◽

On Line

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Timed circuit synthesis using implicit methods

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745146 ◽

1999 ◽

Cited By ~ 2

Author(s):

R.A. Thacker ◽

W. Belluomini ◽

C.J. Myers

Keyword(s):

Circuit Synthesis ◽

Implicit Methods

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Lossy compression of images using logic minimization

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745210 ◽

1999 ◽

Cited By ~ 2

Author(s):

J. Augustine ◽

W. Lynch ◽

Yuke Wang ◽

A.J. Al-Khalili

Keyword(s):

Lossy Compression ◽

Logic Minimization

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Multi-valued logic synthesis

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745148 ◽

1999 ◽

Cited By ~ 25

Author(s):

R.K. Brayton ◽

S.P. Khatri

Keyword(s):

Logic Synthesis

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Exact output response computation of RC interconnects under polynomial input waveforms

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745142 ◽

1999 ◽

Author(s):

S. Gupta ◽

L.M. Patnaik

Keyword(s):

Output Response

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Efficient translation of statecharts to hardware circuits

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745186 ◽

1999 ◽

Cited By ~ 3

Author(s):

S. Ramesh

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Silicon-level physical verification of SubWavelength/sup TM/ designs

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745221 ◽

1999 ◽

Author(s):

Fang-Cheng Chang ◽

M. Kwok ◽

K. Rachlin ◽

R. Pack

Keyword(s):

Silicon Level ◽

Physical Verification

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A low power 256 KB SRAM design

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745126 ◽

1999 ◽

Cited By ~ 1

Author(s):

B. Bhaumik ◽

P. Pradhan ◽

G.S. Visweswaran ◽

R. Varambally ◽

A. Hardi

Keyword(s):

Low Power ◽

Sram Design

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Synthesis of configurable architectures for DSP algorithms

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013) ◽

10.1109/icvd.1999.745181 ◽

1999 ◽

Cited By ~ 1

Author(s):

S. Ramanathan ◽

V. Visvanathan ◽

S.K. Nandy

Keyword(s):

Configurable Architectures

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Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

FAAR: A router for field-programmable analog arrays

A VLSI architecture for on-line image decompression using GF(2/sup 8/) cellular automata

Timed circuit synthesis using implicit methods

Lossy compression of images using logic minimization

Multi-valued logic synthesis

Exact output response computation of RC interconnects under polynomial input waveforms

Efficient translation of statecharts to hardware circuits

Silicon-level physical verification of SubWavelength/sup TM/ designs

A low power 256 KB SRAM design

Synthesis of configurable architectures for DSP algorithms

Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013)
Latest Publications