Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
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9781479910182, 9781479910212

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APOGEE: adaptive prefetching on GPUs for energy efficiency

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618798 ◽

2013 ◽

Author(s):

Per Stenstrom

Keyword(s):

Energy Efficiency

L1-bandwidth aware thread allocation in multicore SMT processors

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618803 ◽

2013 ◽

Cited By ~ 3

Author(s):

Hiroshi Sasaki ◽

Satoshi Imamura ◽

Koji Inoue

An empirical model for predicting cross-core performance interference on multicore processors

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618810 ◽

2013 ◽

Cited By ~ 1

Author(s):

Josue Feliu ◽

Julio Sahuquillo ◽

Salvador Petit ◽

Jose Duato

Keyword(s):

Empirical Model ◽

Multicore Processors

Parallel flow-sensitive pointer analysis by graph-rewriting

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618793 ◽

2013 ◽

Cited By ~ 4

Author(s):

Vaivaswatha Nagaraj ◽

R. Govindarajan

Keyword(s):

Parallel Flow ◽

Pointer Analysis ◽

Graph Rewriting

Concurrent predicates: a debugging technique for every parallel programmer

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618822 ◽

2013 ◽

Cited By ~ 1

Author(s):

Wenhao Jia ◽

Kelly A. Shaw ◽

Margaret Martonosi

A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessors

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618804 ◽

2013 ◽

Cited By ~ 2

Author(s):

Arunachalam Annamalai ◽

Rance Rodrigues ◽

Israel Koren ◽

Sandip Kundu

Keyword(s):

Chip Multiprocessors ◽

Core Selection ◽

Unified View

Starchart: hardware and software optimization using recursive partitioning regression trees

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618815 ◽

2013 ◽

Cited By ~ 2

Author(s):

Kenzo Van Craeynest ◽

Shoaib Akram ◽

Wim Heirman ◽

Aamer Jaleel ◽

Lieven Eeckhout

Keyword(s):

Recursive Partitioning ◽

Regression Trees ◽

Software Optimization

The case for a scalable coherence protocol for complex on-chip cache hierarchies in many core systems

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618817 ◽

2013 ◽

Cited By ~ 2

Author(s):

Jiacheng Zhao ◽

Xiaobing Feng ◽

Huimin Cui ◽

Youliang Yan ◽

Jingling Xue ◽

...

Keyword(s):

Cache Hierarchies ◽

On Chip ◽

Many Core

Building expressive, area-efficient coherence directories

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618819 ◽

2013 ◽

Cited By ~ 1

Author(s):

Vineeth Mekkat ◽

Anup Holey ◽

Pen-Chung Yew ◽

Antonia Zhai

Keyword(s):

Area Efficient

McRouter: multicast within a router for high performance network-on-chips

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques ◽

10.1109/pact.2013.6618821 ◽

2013 ◽

Cited By ~ 2

Author(s):

Janghaeng Lee ◽

Mehrzad Samadi ◽

Yongjun Park ◽

Scott Mahlke

Keyword(s):

High Performance

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation TechniquesLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

APOGEE: adaptive prefetching on GPUs for energy efficiency

L1-bandwidth aware thread allocation in multicore SMT processors

An empirical model for predicting cross-core performance interference on multicore processors

Parallel flow-sensitive pointer analysis by graph-rewriting

Concurrent predicates: a debugging technique for every parallel programmer

A unified view of non-monotonic core selection and application steering in heterogeneous chip multiprocessors

Starchart: hardware and software optimization using recursive partitioning regression trees

The case for a scalable coherence protocol for complex on-chip cache hierarchies in many core systems

Building expressive, area-efficient coherence directories

McRouter: multicast within a router for high performance network-on-chips

Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques
Latest Publications