2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar)
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9780738110424

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Robust Practical Binary Optimization at Run-time using LLVM

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00011 ◽

2020 ◽

Author(s):

Alexis Engelke ◽

Martin Schulz

Keyword(s):

Binary Optimization ◽

Run Time

Deep Learning-based Approximate Graph-Coloring Algorithm for Register Allocation

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00008 ◽

2020 ◽

Author(s):

Dibyendu Das ◽

Shahid Asghar Ahmad ◽

Venkataramanan Kumar

Keyword(s):

Deep Learning ◽

Graph Coloring ◽

Really Embedding Domain-Specific Languages into C++

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00012 ◽

2020 ◽

Author(s):

Hal Finkel ◽

Alex McCaskey ◽

Tobi Popoola ◽

Dmitry Lyakh ◽

Johannes Doerfert

Keyword(s):

Domain Specific Languages ◽

Domain Specific

Introducing multi-level parallelism, at coarse, fine and instruction level to enhance the performance of iterative solvers for large sparse linear systems on Multi- and Many-core architecture

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00014 ◽

2020 ◽

Author(s):

Jean-Marc Gratien

Keyword(s):

Linear Systems ◽

Iterative Solvers ◽

Sparse Linear Systems ◽

Multi Level ◽

Many Core ◽

Level Parallelism

Cover

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00001 ◽

2020 ◽

Workshop Organization

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00005 ◽

2020 ◽

Author Index

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00016 ◽

2020 ◽

Message from the Workshop Chairs

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00004 ◽

2020 ◽

Copyright

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00002 ◽

2020 ◽

Static Neural Compiler Optimization via Deep Reinforcement Learning

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar) ◽

10.1109/llvmhpchipar51896.2020.00006 ◽

2020 ◽

Author(s):

Rahim Mammadli ◽

Ali Jannesari ◽

Felix Wolf

Keyword(s):

Reinforcement Learning ◽

Compiler Optimization

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Robust Practical Binary Optimization at Run-time using LLVM

Deep Learning-based Approximate Graph-Coloring Algorithm for Register Allocation

Really Embedding Domain-Specific Languages into C++

Introducing multi-level parallelism, at coarse, fine and instruction level to enhance the performance of iterative solvers for large sparse linear systems on Multi- and Many-core architecture

Cover

Workshop Organization

Author Index

Message from the Workshop Chairs

Copyright

Static Neural Compiler Optimization via Deep Reinforcement Learning

2020 IEEE/ACM 6th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC) and Workshop on Hierarchical Parallelism for Exascale Computing (HiPar)
Latest Publications