2014 15th International Microprocessor Test and Verification Workshop
Latest Publications

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(FIVE YEARS 0)

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(FIVE YEARS 0)

Published By IEEE

9781467368582

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A Random Instruction Sequence Generator for ARM Based Systems

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.20 ◽

2014 ◽

Cited By ~ 1

Author(s):

Shajid Thiruvathodi ◽

Deepak Yeggina

Keyword(s):

Sequence Generator ◽

Instruction Sequence

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Automatic UVM Environment Generation for Assertion-Based and Functional Verification of SystemC Designs

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.10 ◽

2014 ◽

Cited By ~ 4

Author(s):

Michael Mefenza ◽

Franck Yonga ◽

Christophe Bobda

Keyword(s):

Functional Verification

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[Front cover]

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.32 ◽

2014 ◽

Keyword(s):

Front Cover

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2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.7 ◽

2014 ◽

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Acknowledgment

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.6 ◽

2014 ◽

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System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.23 ◽

2014 ◽

Cited By ~ 2

Author(s):

Moaz Mostafa ◽

Mona Safar ◽

M. Watheq El-Kharashi ◽

Mohamed Dessouky

Keyword(s):

Simulation Results ◽

Visualization Simulation

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FIES: A Fault Injection Framework for the Evaluation of Self-Tests for COTS-Based Safety-Critical Systems

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.27 ◽

2014 ◽

Cited By ~ 4

Author(s):

Andrea Holler ◽

Gerhard Schonfelder ◽

Nermin Kajtazovic ◽

Tobias Rauter ◽

Christian Kreiner

Keyword(s):

Fault Injection ◽

Critical Systems ◽

Safety Critical ◽

Safety Critical Systems

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[Title page i]

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.1 ◽

2014 ◽

Keyword(s):

Title Page

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Synthesizable Memory Models for Virtual Prototyping

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.17 ◽

2014 ◽

Author(s):

Parikshit Pritam Dhodapkar

Keyword(s):

Virtual Prototyping ◽

Memory Models

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Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors

2014 15th International Microprocessor Test and Verification Workshop ◽

10.1109/mtv.2014.21 ◽

2014 ◽

Cited By ~ 4

Author(s):

Luka Charvat ◽

Ales Smrcka ◽

Toma Vojnar

Keyword(s):

Formal Verification ◽

Hazard Analysis ◽

Parameterized Systems

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2014 15th International Microprocessor Test and Verification Workshop
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Random Instruction Sequence Generator for ARM Based Systems

Automatic UVM Environment Generation for Assertion-Based and Functional Verification of SystemC Designs

[Front cover]

Table of contents

Acknowledgment

System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation

FIES: A Fault Injection Framework for the Evaluation of Self-Tests for COTS-Based Safety-Critical Systems

[Title page i]

Synthesizable Memory Models for Virtual Prototyping

Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors

Export Citation Format

2014 15th International Microprocessor Test and Verification WorkshopLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

A Random Instruction Sequence Generator for ARM Based Systems

Automatic UVM Environment Generation for Assertion-Based and Functional Verification of SystemC Designs

[Front cover]

Table of contents

Acknowledgment

System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation

FIES: A Fault Injection Framework for the Evaluation of Self-Tests for COTS-Based Safety-Critical Systems

[Title page i]

Synthesizable Memory Models for Virtual Prototyping

Using Formal Verification of Parameterized Systems in RAW Hazard Analysis in Microprocessors

2014 15th International Microprocessor Test and Verification Workshop
Latest Publications