2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)
Latest Publications

TOTAL DOCUMENTS

(FIVE YEARS 65)

H-INDEX

(FIVE YEARS 4)

Published By IEEE

9781728161495

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00017 ◽

2020 ◽

Cited By ~ 5

Author(s):

Elaheh Sadredini ◽

Reza Rahimi ◽

Marzieh Lenjani ◽

Mircea Stan ◽

Kevin Skadron

Keyword(s):

Pattern Matching

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Twig: Multi-Agent Task Management for Colocated Latency-Critical Cloud Services

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00023 ◽

2020 ◽

Cited By ~ 2

Author(s):

Rajiv Nishtala ◽

Vinicius Petrucci ◽

Paul Carpenter ◽

Magnus Sjalander

Keyword(s):

Cloud Services ◽

Task Management ◽

Multi Agent

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Precise Runahead Execution

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00040 ◽

2020 ◽

Author(s):

Ajeya Naithani ◽

Josue Feliu ◽

Almutaz Adileh ◽

Lieven Eeckhout

Keyword(s):

Runahead Execution

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Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00014 ◽

2020 ◽

Cited By ~ 3

Author(s):

Jingwen Leng ◽

Alper Buyuktosunoglu ◽

Ramon Bertran ◽

Pradip Bose ◽

Quan Chen ◽

...

Keyword(s):

Error Recovery ◽

Transient Error ◽

Task Level

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SnackNoC: Processing in the Communication Layer

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00045 ◽

2020 ◽

Cited By ~ 2

Author(s):

Karthik Sangaiah ◽

Michael Lui ◽

Ragh Kuttappa ◽

Baris Taskin ◽

Mark Hempstead

Keyword(s):

Communication Layer

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Message from the Program Chairs

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00005 ◽

2020 ◽

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HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00054 ◽

2020 ◽

Cited By ~ 1

Author(s):

Xiaowei Ren ◽

Daniel Lustig ◽

Evgeny Bolotin ◽

Aamer Jaleel ◽

Oreste Villa ◽

...

Keyword(s):

Cache Coherence ◽

Cache Coherence Protocols ◽

Coherence Protocols

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Multi-Range Supported Oblivious RAM for Efficient Block Data Retrieval

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00038 ◽

2020 ◽

Cited By ~ 1

Author(s):

Yuezhi Che ◽

Rujia Wang

Keyword(s):

Data Retrieval ◽

Oblivious Ram ◽

Block Data

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Q-Zilla: A Scheduling Framework and Core Microarchitecture for Tail-Tolerant Microservices

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00026 ◽

2020 ◽

Cited By ~ 2

Author(s):

Amirhossein Mirhosseini ◽

Brendan L. West ◽

Geoffrey W. Blake ◽

Thomas F. Wenisch

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ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA) ◽

10.1109/hpca47549.2020.00034 ◽

2020 ◽

Author(s):

Keni Qiu ◽

Nicholas Jao ◽

Mengying Zhao ◽

Cyan Subhra Mishra ◽

Gulsum Gudukbay ◽

...

Keyword(s):

Energy Harvesting ◽

Embedded Processors

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2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Impala: Algorithm/Architecture Co-Design for In-Memory Multi-Stride Pattern Matching

Twig: Multi-Agent Task Management for Colocated Latency-Critical Cloud Services

Precise Runahead Execution

Asymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems

SnackNoC: Processing in the Communication Layer

Message from the Program Chairs

HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems

Multi-Range Supported Oblivious RAM for Efficient Block Data Retrieval

Q-Zilla: A Scheduling Framework and Core Microarchitecture for Tail-Tolerant Microservices

ResiRCA: A Resilient Energy Harvesting ReRAM Crossbar-Based Accelerator for Intelligent Embedded Processors

2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)
Latest Publications