Third Caltech Conference on Very Large Scale Integration
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23

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Published By Springer Berlin Heidelberg

9783540123699, 9783642954320

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A Case Study of the F.I.R.S.T. Silicon Compiler

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_23 ◽

1983 ◽

pp. 413-430 ◽

Author(s):

Neil Bergmann

Keyword(s):

Silicon Compiler

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New VLSI Architectures with Reduced Hardware

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_20 ◽

1983 ◽

pp. 351-377 ◽

Author(s):

Joseph Ja’Ja’ ◽

Robert Michael Owens

Keyword(s):

Vlsi Architectures

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A Hierarchical Simulator Based on Formal Semantics

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_12 ◽

1983 ◽

pp. 207-223 ◽

Author(s):

Marina C. Chen ◽

Carver A. Mead

Keyword(s):

Formal Semantics

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River Routing: Methodology and Analysis

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_9 ◽

1983 ◽

pp. 141-163 ◽

Author(s):

Ron Y. Pinter

Keyword(s):

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Optimizing Synchronous Circuitry by Retiming (Preliminary Version)

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_7 ◽

1983 ◽

pp. 87-116 ◽

Author(s):

Charles E. Leiserson ◽

Flavio M. Rose ◽

James B. Saxe

Keyword(s):

Preliminary Version

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A Self-Timed Static RAM

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_16 ◽

1983 ◽

pp. 275-285 ◽

Author(s):

Edward H. Frank ◽

Robert F. Sproull

Keyword(s):

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Practical Experience With VLSI Methodology

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_1 ◽

1983 ◽

pp. 1-13

Author(s):

Egon Hörbst ◽

Gerd Sandweg ◽

Stefan Wallstab

Keyword(s):

Practical Experience

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Crystal: A Timing Analyzer for nMOS VLSI Circuits

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_5 ◽

1983 ◽

pp. 57-69 ◽

Author(s):

John K. Ousterhout

Keyword(s):

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CAPRI: A Design Methodology and a Silicon Compiler for VLSI Circuits Specified by Algorithms

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_2 ◽

1983 ◽

pp. 15-31 ◽

Author(s):

F. Anceau

Keyword(s):

Design Methodology ◽

Vlsi Circuits ◽

Silicon Compiler

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A VLSI Chess Legal Move Generator

Third Caltech Conference on Very Large Scale Integration ◽

10.1007/978-3-642-95432-0_19 ◽

1983 ◽

pp. 331-350 ◽

Author(s):

Jonathan Schaeffer ◽

P. A. D. Powell ◽

Jim Jonkman

Keyword(s):

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