2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Latest Publications

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Published By IEEE

9781538647318

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FPGA-oriented moving target defense against security threats from malicious FPGA tools

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383907 ◽

2018 ◽

Cited By ~ 5

Author(s):

Zhiming Zhang ◽

Qiaoyan Yu ◽

Laurent Njilla ◽

Charles Kamhoua

Keyword(s):

Moving Target ◽

Security Threats ◽

Moving Target Defense

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B-TREPID: Batteryless tamper-resistant envelope with a PUF and integrity detection

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383890 ◽

2018 ◽

Cited By ~ 9

Author(s):

Vincent Immler ◽

Johannes Obermaier ◽

Martin Konig ◽

Matthias Hiller ◽

Georg Sig

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A compact energy-efficient pseudo-static camouflaged logic family

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383896 ◽

2018 ◽

Cited By ~ 1

Author(s):

Prashanth Mohan ◽

N E C Akkaya ◽

Burak Erbagci ◽

Ken Mai

Keyword(s):

Energy Efficient

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Secure chip odometers using intentional controlled aging

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383898 ◽

2018 ◽

Cited By ~ 1

Author(s):

Nail Etkin Can Akkaya ◽

Burak Erbagci ◽

Ken Mai

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Lowering the barrier to online malware detection through low frequency sampling of HPCs

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383910 ◽

2018 ◽

Cited By ~ 1

Author(s):

Patrick Cronin ◽

Chengmo Yang

Keyword(s):

Malware Detection ◽

Low Frequency ◽

Frequency Sampling

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Fresh re-keying with strong PUFs: A new approach to side-channel security

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383899 ◽

2018 ◽

Cited By ~ 5

Author(s):

Xiaodan Xi ◽

Aydin Aysu ◽

Michael Orshansky

Keyword(s):

Side Channel ◽

New Approach

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RF-PUF: IoT security enhancement through authentication of wireless nodes using in-situ machine learning

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383916 ◽

2018 ◽

Cited By ~ 8

Author(s):

Baibhab Chatterjee ◽

Debayan Das ◽

Shreyas Sen

Keyword(s):

Machine Learning ◽

Iot Security ◽

Security Enhancement ◽

Wireless Nodes

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TZSlicer: Security-aware dynamic program slicing for hardware isolation

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383886 ◽

2018 ◽

Cited By ~ 3

Author(s):

Mengmei Ye ◽

Jonathan Sherman ◽

Witawas Srisa-an ◽

Sheng Wei

Keyword(s):

Program Slicing ◽

Dynamic Program

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Delay model and machine learning exploration of a hardware-embedded delay PUF

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383905 ◽

2018 ◽

Cited By ~ 1

Author(s):

Wenjie Che ◽

Manel Martinez-Ramon ◽

Fareena Saqib ◽

Jim Plusquellic

Keyword(s):

Machine Learning ◽

Delay Model

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Repurposing SoC analog circuitry for additional COTS hardware security

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST) ◽

10.1109/hst.2018.8383915 ◽

2018 ◽

Cited By ~ 1

Author(s):

Adam Duncan ◽

Lei Jiang ◽

Martin Swany

Keyword(s):

Hardware Security ◽

Analog Circuitry

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2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

FPGA-oriented moving target defense against security threats from malicious FPGA tools

B-TREPID: Batteryless tamper-resistant envelope with a PUF and integrity detection

A compact energy-efficient pseudo-static camouflaged logic family

Secure chip odometers using intentional controlled aging

Lowering the barrier to online malware detection through low frequency sampling of HPCs

Fresh re-keying with strong PUFs: A new approach to side-channel security

RF-PUF: IoT security enhancement through authentication of wireless nodes using in-situ machine learning

TZSlicer: Security-aware dynamic program slicing for hardware isolation

Delay model and machine learning exploration of a hardware-embedded delay PUF

Repurposing SoC analog circuitry for additional COTS hardware security

2018 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Latest Publications