side channel
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2022 ◽  
Vol 27 (3) ◽  
pp. 1-31
Yukui Luo ◽  
Shijin Duan ◽  
Xiaolin Xu

With the emerging cloud-computing development, FPGAs are being integrated with cloud servers for higher performance. Recently, it has been explored to enable multiple users to share the hardware resources of a remote FPGA, i.e., to execute their own applications simultaneously. Although being a promising technique, multi-tenant FPGA unfortunately brings its unique security concerns. It has been demonstrated that the capacitive crosstalk between FPGA long-wires can be a side-channel to extract secret information, giving adversaries the opportunity to implement crosstalk-based side-channel attacks. Moreover, recent work reveals that medium-wires and multiplexers in configurable logic block (CLB) are also vulnerable to crosstalk-based information leakage. In this work, we propose FPGAPRO: a defense framework leveraging P lacement, R outing, and O bfuscation to mitigate the secret leakage on FPGA components, including long-wires, medium-wires, and logic elements in CLB. As a user-friendly defense strategy, FPGAPRO focuses on protecting the security-sensitive instances meanwhile considering critical path delay for performance maintenance. As the proof-of-concept, the experimental result demonstrates that FPGAPRO can effectively reduce the crosstalk-caused side-channel leakage by 138 times. Besides, the performance analysis shows that this strategy prevents the maximum frequency from timing violation.

2022 ◽  
Vol 18 (1) ◽  
pp. 1-17
Josef Danial ◽  
Debayan Das ◽  
Anupam Golder ◽  
Santosh Ghosh ◽  
Arijit Raychowdhury ◽  

This work presents a Cross-device Deep-Learning based Electromagnetic (EM-X-DL) side-channel analysis (SCA) on AES-128, in the presence of a significantly lower signal-to-noise ratio (SNR) compared to previous works. Using a novel algorithm to intelligently select multiple training devices and proper choice of hyperparameters, the proposed 256-class deep neural network (DNN) can be trained efficiently utilizing pre-processing techniques like PCA, LDA, and FFT on measurements from the target encryption engine running on an 8-bit Atmel microcontroller. In this way, EM-X-DL achieves >90% single-trace attack accuracy. Finally, an efficient end-to-end SCA leakage detection and attack framework using EM-X-DL demonstrates high confidence of an attacker with <20 averaged EM traces.

2022 ◽  
G Sowmiya ◽  
S. Malarvizhi

Abstract During testing utmost all appropriate and suitable strategy needs to be established for consistent fault coverage, improved controllability and observability. The scan chains used in BIST allows some fine control over data propagations that is used as a backdoor to break the security over cryptographic cores. To alleviate these scan-based side-channel attacks, implementing a more inclusive security strategy is required to confuse the attacker and to ensure the key management process which is always a difficult task to task in cryptographic research. In this work for testing AES core Design-for-Testability (DfT) is considered with some random response compaction, bit masking during the scan process. In the proposed scan architecture, scan-based attack does not allow finding out actual computations which are related to the cipher transformations and key sequence. And observing the data through the scan structure is secured. The experimental results validate the potential metrics of the proposed scan model in terms of robustness to the scan attack and penalty gap that exists due to the inclusion of scan designs in AES core. Also investigate the selection of appropriate location points to implement the bit level modification to avoid attack for retrieving a key.

2022 ◽  
Vol 14 (1) ◽  
pp. 24
Hui Yan ◽  
Chaoyuan Cui

Cache side channel attacks, as a type of cryptanalysis, seriously threaten the security of the cryptosystem. These attacks continuously monitor the memory addresses associated with the victim’s secret information, which cause frequent memory access on these addresses. This paper proposes CacheHawkeye, which uses the frequent memory access characteristic of the attacker to detect attacks. CacheHawkeye monitors memory events by CPU hardware performance counters. We proved the effectiveness of CacheHawkeye on Flush+Reload and Flush+Flush attacks. In addition, we evaluated the accuracy of CacheHawkeye under different system loads. Experiments demonstrate that CacheHawkeye not only has good accuracy but can also adapt to various system loads.

2022 ◽  
Vol 7 ◽  
pp. e829
Yun Lin Liu ◽  
Yan Kai Chen ◽  
Wei Xiong Li ◽  
Yang Zhang

Background The side-channel cryptanalysis method based on convolutional neural network (CNNSCA) can effectively carry out cryptographic attacks. The CNNSCA network models that achieve cryptanalysis mainly include CNNSCA based on the VGG variant (VGG-CNNSCA) and CNNSCA based on the Alexnet variant (Alex-CNNSCA). The learning ability and cryptanalysis performance of these CNNSCA models are not optimal, and the trained model has low accuracy, too long training time, and takes up more computing resources. In order to improve the overall performance of CNNSCA, the paper will improve CNNSCA model design and hyperparameter optimization. Methods The paper first studied the CNN architecture composition in the SCA application scenario, and derives the calculation process of the CNN core algorithm for side-channel leakage of one-dimensional data. Secondly, a new basic model of CNNSCA was designed by comprehensively using the advantages of VGG-CNNSCA model classification and fitting efficiency and Alex-CNNSCA model occupying less computing resources, in order to better reduce the gradient dispersion problem of error back propagation in deep networks, the SE (Squeeze-and-Excitation) module is newly embedded in this basic model, this module is used for the first time in the CNNSCA model, which forms a new idea for the design of the CNNSCA model. Then apply this basic model to a known first-order masked dataset from the side-channel leak public database (ASCAD). In this application scenario, according to the model design rules and actual experimental results, exclude non-essential experimental parameters. Optimize the various hyperparameters of the basic model in the most objective experimental parameter interval to improve its cryptanalysis performance, which results in a hyper-parameter optimization scheme and a final benchmark for the determination of hyper-parameters. Results Finally, a new CNNSCA model optimized architecture for attacking unprotected encryption devices is obtained—CNNSCAnew. Through comparative experiments, CNNSCAnew’s guessing entropy evaluation results converged to 61. From model training to successful recovery of the key, the total time spent was shortened to about 30 min, and we obtained better performance than other CNNSCA models.

Takuji Miki ◽  
Makoto Nagata

Abstract Cryptographic ICs on edge devices for internet-of-things (IoT) applications are exposed to an adversary and threatened by malicious side channel analysis. On-chip analog monitoring by sensor circuits embedded inside the chips is one of the possible countermeasures against such attacks. An on-chip monitor circuit consisting of a successive approximation register (SAR) analog-to-digital converter (ADC) and an input buffer acquires a wideband signal, which enables to detects an irregular noise due to an active fault injection and a passive side channel leakage analysis. In this paper, several countermeasures against security attacks utilizing wideband on-chip monitors are reviewed. Each technique is implemented on a prototype chip, and the measurement results prove they can effectively detect and diagnose the security attacks.

2022 ◽  
Gopinath N ◽  
Prayla Shyry D

Abstract Network security is critical for both personal and business networks. Most homes with high – speed internet have one or more wireless routers, which can be hacked if not adequately secured. Even though, if more number of solutions were addressed for security, still the security is challenging one in networks.Quantum Key Distribution was proposed to enhance security in the past literature. In this QKD, the secret message was converted in to Q-bits. Through this side channel, there is a chance to hack the data by the Eavesdropper which cannot be identified by the receiver side. So, receiver will send the acknowledgement to the sender for sending encrypted data in the classical channel.From this, the hacker can easily fetch the encrypted data from the classical channel. To address this issue, Security in Quantum side Channel (SQSC) framework has been proposed in which Shifting and Binary Conversions (SBC) algorithm has been implemented. This proposed security model attains good performance to a greater extent.

Zixin Liu ◽  
Zhibo Wang ◽  
Mingxing Ling

Side-channel attack (SCA) based on machine learning has proved to be a valid technique in cybersecurity, especially subjecting to the symmetric-key crypto implementations in serial operation. At the same time, parallel-encryption computing based on Field Programmable Gate Arrays (FPGAs) grows into a new influencer, but the attack results using machine learning are exiguous. Research on the traditional SCA has been mostly restricted to pre-processing: Signal Noisy Ratio (SNR) and Principal Component Analysis (PCA), etc. In this work, firstly, we propose to replace Points of Interests (POIs) and dimensionality reduction by utilizing word embedding, which converts power traces into sensitive vectors. Secondly, we combined sensitive vectors with Long Short Term Memories (LSTM) to execute SCA based on FPGA crypto-implementations. In addition, compared with traditional Template Attack (TA), Multiple Multilayer Perceptron (MLP) and Convolutional Neural Network (CNN). The result shows that the proposed model can not only reduce the manual operation, such as parametric assumptions and dimensionality setting, which limits their range of application, but improve the effectiveness of side-channel attacks as well.

2022 ◽  
pp. 104420
Kai Wang ◽  
Fengkai Yuan ◽  
Lutan Zhao ◽  
Rui Hou ◽  
Zhenzhou Ji ◽  

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