A Multi-start Heuristic for Multiplicative Depth Minimization of Boolean Circuits

2018 ◽  
pp. 275-286 ◽  
Author(s):  
Sergiu Carpov ◽  
Pascal Aubry ◽  
Renaud Sirdey
Keyword(s):  
Boolean Circuits

scholarly journals Quantum boolean circuits construction using tabulation method

2005 ◽  
Author(s):  
Chin-Yung Lu ◽  
Shiou-An Wang ◽  
Sy-Yen Kuo
Keyword(s):  
Boolean Circuits

scholarly journals Additive-error fine-grained quantum supremacy

Quantum ◽  
2020 ◽  
Vol 4 ◽  
pp. 329
Author(s):  
Tomoyuki Morimae ◽  
Suguru Tamaki
Keyword(s):  
Quantum Computing ◽  
Complexity Theory ◽  
Polynomial Time ◽  
Boolean Circuits ◽  
Exponential Time ◽  
Fine Grained ◽  
Additive Error ◽  
Universal Quantum ◽  
The One ◽  
Computing Models

It is known that several sub-universal quantum computing models, such as the IQP model, the Boson sampling model, the one-clean qubit model, and the random circuit model, cannot be classically simulated in polynomial time under certain conjectures in classical complexity theory. Recently, these results have been improved to ``fine-grained" versions where even exponential-time classical simulations are excluded assuming certain classical fine-grained complexity conjectures. All these fine-grained results are, however, about the hardness of strong simulations or multiplicative-error sampling. It was open whether any fine-grained quantum supremacy result can be shown for a more realistic setup, namely, additive-error sampling. In this paper, we show the additive-error fine-grained quantum supremacy (under certain complexity assumptions). As examples, we consider the IQP model, a mixture of the IQP model and log-depth Boolean circuits, and Clifford+T circuits. Similar results should hold for other sub-universal models.

scholarly journals The Computational Complexity of Understanding Binary Classifier Decisions

2021 ◽  
Vol 70 ◽  
Author(s):  
Stephan Waeldchen ◽  
Jan Macdonald ◽  
Sascha Hauch ◽  
Gitta Kutyniok
Keyword(s):  
Polynomial Time Algorithm ◽  
Time Algorithm ◽  
Boolean Circuits ◽  
Binary Classifier ◽  
Minimal Set ◽  
Limited Size ◽  
Approximation Factor ◽  
Special Cases ◽  
Relevant Variables ◽  
Binary Classifiers

For a d-ary Boolean function Φ: {0, 1}d → {0, 1} and an assignment to its variables x = (x1, x2, . . . , xd) we consider the problem of finding those subsets of the variables that are sufficient to determine the function value with a given probability δ. This is motivated by the task of interpreting predictions of binary classifiers described as Boolean circuits, which can be seen as special cases of neural networks. We show that the problem of deciding whether such subsets of relevant variables of limited size k ≤ d exist is complete for the complexity class NPPP and thus, generally, unfeasible to solve. We then introduce a variant, in which it suffices to check whether a subset determines the function value with probability at least δ or at most δ − γ for 0 < γ < δ. This promise of a probability gap reduces the complexity to the class NPBPP. Finally, we show that finding the minimal set of relevant variables cannot be reasonably approximated, i.e. with an approximation factor d1−α for α > 0, by a polynomial time algorithm unless P = NP. This holds even with the promise of a probability gap.

Gradual GRAM and secure computation for RAM programs

2021 ◽  
pp. 1-33
Author(s):  
Carmit Hazay ◽  
Mor Lilintal
Keyword(s):  
Secure Computation ◽  
Boolean Circuits ◽  
Conceptual Similarity ◽  
Garbled Circuits ◽  
Security Guarantees

Despite the fact that the majority of applications encountered in practice today are captured more efficiently by RAM programs, the area of secure two-party computation (2PC) has seen tremendous improvement mostly for Boolean circuits. One of the most studied objects in this domain is garbled circuits. Analogously, garbled RAM (GRAM) provide similar security guarantees for RAM programs with applications to constant round 2PC. In this work we consider the notion of gradual GRAM which requires no memory garbling algorithm. Our approach provides several qualitative advantages over prior works due to the conceptual similarity to the analogue garbling mechanism for Boolean circuits. We next revisit the GRAM construction from (In STOC (2015) 449–458) and improve it in two orthogonal aspects: match it directly with tree-based ORAMs and explore its consistency with gradual ORAM.

Simulating Boolean Circuits with P Systems

2004 ◽  
pp. 104-122 ◽  
Author(s):  
Rodica Ceterchi ◽  
Dragoş Sburlan
Keyword(s):  
P Systems ◽  
Boolean Circuits
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