A Genetic Algorithm for VLSI Floorplanning Using O-Tree Representation

2005 ◽  
pp. 215-224 ◽  
Author(s):  
Maolin Tang ◽  
Alvin Sebastian
Keyword(s):  
Genetic Algorithm ◽  
Tree Representation ◽  
Vlsi Floorplanning

scholarly journals A Metaheuristic Algorithm for VLSI Floorplanning Problem

2019 ◽  
Vol 8 (2S5) ◽  
pp. 249-254
Keyword(s):  
Genetic Algorithm ◽  
Large Scale ◽  
Search Algorithm ◽  
Design Method ◽  
Harmony Search ◽  
Optimal Solution ◽  
Harmony Search Algorithm ◽  
Chip Area ◽  
Optimum Solution ◽  
Vlsi Floorplanning

Floorplanning plays an important role within the physical design method of very large Scale Integrated (VLSI) chips. It’s a necessary design step to estimate the chip area before the optimized placement of digital blocks and their interconnections. Since VLSI floorplanning is an NP-hard problem, several improvement techniques were adopted to find optimal solution. In this paper, a hybrid algorithm which is genetic algorithm combined with music-inspired Harmony Search (HS) algorithm is employed for the fixed die outline constrained floorplanning, with the ultimate aim of reducing the full chip area. Initially, B*-tree is employed to come up with the first floorplan for the given rectangular hard modules and so Harmony Search algorithm is applied in any stages in genetic algorithm to get an optimum solution for the economical floorplan. The experimental results of the HGA algorithm are obtained for the MCNC benchmark circuits

The ground state energy of the ±J spin glass from the genetic algorithm

1994 ◽  
Vol 4 (9) ◽  
pp. 1281-1285 ◽  
Author(s):  
P. Sutton ◽  
D. L. Hunter ◽  
N. Jan
Keyword(s):  
Genetic Algorithm ◽  
Spin Glass ◽  
Ground State Energy ◽  
Ground State ◽  
State Energy
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