Power Optimization of a 32-Bit ALU Using Distributed Clock Gating Technique

Lecture Notes in Electrical Engineering - Advances in Electrical and Computer Technologies ◽

10.1007/978-981-15-5558-9_71 ◽

2020 ◽

pp. 831-841

Author(s):

Roopa R. Kulkarni ◽

S. Y. Kulkarni

Keyword(s):

Power Optimization ◽

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Power Optimization of Sequential Circuits Using Switching Activity Based Clock Gating

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e93.a.2472 ◽

2010 ◽

Vol E93-A (12) ◽

pp. 2472-2480 ◽

Author(s):

Xin MAN ◽

Takashi HORIYAMA ◽

Shinji KIMURA

Keyword(s):

Power Optimization ◽

Sequential Circuits ◽

Switching Activity ◽

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Clock-tree power optimization based on RTL clock-gating

Proceedings of the 40th conference on Design automation - DAC '03 ◽

10.1145/775832.775989 ◽

2003 ◽

Author(s):

Monica Donno ◽

Alessandro Ivaldi ◽

Luca Benini ◽

Enrico Macii

Keyword(s):

Power Optimization ◽

Clock Gating ◽

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Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks

Proceedings European Design and Test Conference. ED & TC 97 ◽

10.1109/edtc.1997.582409 ◽

2002 ◽

Author(s):

L. Benini ◽

G. De Micheli ◽

E. Macii ◽

M. Poncino ◽

R. Scarsi

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Symbolic Synthesis

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Clock gating for power optimization in ASIC design cycle theory & practice

Proceeding of the thirteenth international symposium on Low power electronics and design - ISLPED '08 ◽

10.1145/1393921.1394003 ◽

2008 ◽

Author(s):

Jairam S ◽

Madhusudan Rao ◽

Jithendra Srinivas ◽

Parimala Vishwanath ◽

Udayakumar H ◽

...

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Asic Design ◽

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Power Optimization of Communication System Using Clock Gating Technique

2015 Fifth International Conference on Advanced Computing & Communication Technologies ◽

10.1109/acct.2015.74 ◽

2015 ◽

Author(s):

Kanika Sahni ◽

Kiran Rawat ◽

Sujata Pandey ◽

Ziauddin Ahmad

Keyword(s):

Communication System ◽

Power Optimization ◽

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Dynamic power optimization of LFSR using clock gating

2017 International Conference on Innovations in Information, Embedded and Communication Systems (ICIIECS) ◽

10.1109/iciiecs.2017.8275949 ◽

2017 ◽

Author(s):

K Madhushree ◽

Niju Rajan

Keyword(s):

Power Optimization ◽

Clock Gating ◽

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Clock Gating Efficiency and Impact on Power Optimization During Synthesis Flow

10.1109/icm52667.2021.9664896 ◽

2021 ◽

Author(s):

Yassine Attaoui ◽

Mohamed Chentouf ◽

Zine El Abidine Alaoui Ismaili ◽

Aimad El Mourabit

Keyword(s):

Power Optimization ◽

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Clock gating -A power optimization technique for smart card

2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT) ◽

10.1109/icsict.2014.7021594 ◽

2014 ◽

Author(s):

Yongwang Zhou ◽

Xiaohong Peng ◽

Ligang Hou ◽

Peiyuan Wan ◽

Pingfen Lin

Keyword(s):

Power Optimization ◽

Optimization Technique ◽

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Dynamic power optimization using look-ahead clock gating technique

2017 2nd IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT) ◽

10.1109/rteict.2017.8256598 ◽

2017 ◽

Author(s):

Madhushree ◽

Niju Rajan

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Dynamic Power ◽

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Power optimization for video application using clock-gating technique

2015 2nd World Symposium on Web Applications and Networking (WSWAN) ◽

10.1109/wswan.2015.7210340 ◽

2015 ◽

Author(s):

Lilia Kechiche ◽

Lamjed Touil ◽

Bouraoui Ouni ◽

Abdellatif Mtibaa

Keyword(s):

Power Optimization ◽

Clock Gating ◽

Video Application

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