Simultaneous wiring and buffer block planning with optimal wire-sizing for interconnect-driven floorplanning

IEE Proceedings - Computers and Digital Techniques ◽

10.1049/ip-cdt:20060077 ◽

2006 ◽

Vol 153 (5) ◽

pp. 335 ◽

Author(s):

J.-T. Yan

Keyword(s):

Wire Sizing ◽

Buffer Block ◽

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Simultaneous wiring and buffer block planning with optimal wire-sizing for interconnect-driven floorplanning

The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04. ◽

10.1109/mwscas.2004.1354029 ◽

2004 ◽

Author(s):

Jin-Tai Yan ◽

Chao-Hung Lu ◽

Chia-Wei Wu

Keyword(s):

Wire Sizing ◽

Buffer Block ◽

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Simultaneous floorplanning and buffer block planning

Proceedings of the 2003 conference on Asia South Pacific design automation - ASPDAC ◽

10.1145/1119772.1119858 ◽

2003 ◽

Author(s):

Iris Hui-Ru Jiang ◽

Yao-Wen Chang ◽

Jing-Yang Jou ◽

Kai-Yuan Chao

Keyword(s):

Buffer Block ◽

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Multi-Level Buffer Block Planning and Buffer Insertion for Large Design Circuits

IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06) ◽

10.1109/isvlsi.2006.63 ◽

2006 ◽

Author(s):

A. Jahanian ◽

M.S. Zamani

Keyword(s):

Buffer Insertion ◽

Multi Level ◽

Buffer Block ◽

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Routability-driven floorplanner with buffer block planning

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2003.809649 ◽

2003 ◽

Vol 22 (4) ◽

pp. 470-480 ◽

Author(s):

Chiu-Wing Sham ◽

E.F.Y. Young

Keyword(s):

Buffer Block ◽

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Routability driven floorplanner with buffer block planning

Proceedings of the 2002 international symposium on Physical design - ISPD '02 ◽

10.1145/505388.505402 ◽

2002 ◽

Author(s):

Chiu Wing Sham ◽

Evangeline F. Y. Young

Keyword(s):

Buffer Block ◽

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Buffer block planning for interconnect-driven floorplanning

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) ◽

10.1109/iccad.1999.810675 ◽

2003 ◽

Author(s):

J. Cong ◽

Tianming Kong ◽

D.Z. Pan

Keyword(s):

Buffer Block ◽

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Simultaneous floorplanning and buffer block planning

Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. ◽

10.1109/aspdac.2003.1195054 ◽

2003 ◽

Author(s):

I. Hui-Ru Jiang ◽

Yao-Wen Chang ◽

Jing-Yang Jou ◽

Kai-Yuan Chao

Keyword(s):

Buffer Block ◽

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Buffer block planning for interconnect planning and prediction

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.974906 ◽

2001 ◽

Vol 9 (6) ◽

pp. 929-937 ◽

Author(s):

J. Cong ◽

Tianming Kong ◽

Z.D. Pan

Keyword(s):

Interconnect Planning ◽

Buffer Block ◽

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Effect of a low-moisture buffer block on ruminal pH in lactating dairy cattle induced with subacute ruminal acidosis

Journal of Dairy Science ◽

10.3168/jds.2007-0959 ◽

2009 ◽

Vol 92 (1) ◽

pp. 352-364 ◽

Author(s):

K.M. Krause ◽

D.V. Dhuyvetter ◽

G.R. Oetzel

Keyword(s):

Dairy Cattle ◽

Subacute Ruminal Acidosis ◽

Ruminal Acidosis ◽

Lactating Dairy Cattle ◽

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Simultaneous wire sizing and wire spacing in post-layout performance optimization

Proceedings of 1998 Asia and South Pacific Design Automation Conference ◽

10.1109/aspdac.1998.669503 ◽

2002 ◽

Author(s):

Jiang-An He ◽

H. Kobayashi

Keyword(s):

Performance Optimization ◽

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