Design and implementation of approximately linear phase two-dimensional IIR filters

1998 ◽  
Vol 45 (9) ◽  
pp. 1279-1288 ◽  
Author(s):  
Chengshan Xiao ◽  
P. Agathoklis
Keyword(s):  
Two Dimensional ◽  
Linear Phase ◽  
Iir Filters ◽  
Design And Implementation

scholarly journals Design and Implementation of 64 Bit IIR Filters Using Vedic Multipliers

2016 ◽  
Vol 85 ◽  
pp. 790-797 ◽  
Author(s):  
Anuradha Savadi ◽  
Raju Yanamshetti ◽  
Shewta Biradar
Keyword(s):  
Iir Filters ◽  
Design And Implementation

A new improvement to the Powell and Chau linear phase IIR filters

1998 ◽  
Vol 46 (6) ◽  
pp. 1685-1688 ◽  
Author(s):  
B. Djokic ◽  
M. Popovic ◽  
M. Lutovac
Keyword(s):  
Linear Phase ◽  
Iir Filters

Two-Dimensional IIR Filters

2005 ◽  
pp. 24-1-24-49
Author(s):  
A Constantinides ◽  
X Xu
Keyword(s):  
Two Dimensional ◽  
Iir Filters

The Design and Implementation of Parallel Distributed Algorithm FIR Filter Based on FPGA

2012 ◽  
Vol 571 ◽  
pp. 534-537
Author(s):  
Bao Feng Zhang ◽  
De Hu Man ◽  
Jun Chao Zhu
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Distributed Algorithm ◽  
Design Method ◽  
Fir Filter ◽  
Experimental Results ◽  
Linear Phase ◽  
Design And Implementation ◽  
Field Programmable

The article proposed a new method for implementing linear phase FIR filter based on FPGA. For the key to implementing the FIR filter on FPGA—multiply-add operation, a parallel distributed algorithm was presented, which is based on LUT. The designed file was described with VHDL and realized on Altera’s field programmable gate array (FPGA), giving the design method. The experimental results indicated that the system can run stably at 120MHz or more, which can meet the requirements of signal processing for real-time.

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