Concurrent Ternary Galois-based Computation using Nano-apex Multiplexing Nibs of Regular Three-dimensional Networks, Part II: Formalistic Architecture Realization

Novel realizations of concurrent computations utilizing three-dimensional lattice networks and their corresponding carbon-based field emission controlled switching is introduced in this article. The formalistic ternary nano-based implementation utilizes recent findings in field emission and nano applications which include carbon-based nanotubes and nanotips for three-valued lattice computing via field-emission methods. The presented work implements multi-valued Galois functions by utilizing concurrent nano-based lattice systems, which use two-to-one controlled switching via carbon-based field emission devices by using nano-apex carbon fibers and carbon nanotubes that were presented in the first part of the article. The introduced computational extension utilizing many-to-one carbon field-emission devices will be further utilized in implementing congestion-free architectures within the third part of the article. The emerging nano-based technologies form important directions in low-power compact-size regular lattice realizations, in which carbon-based devices switch less-costly and more-reliably using much less power than silicon-based devices. Applications include low-power design of VLSI circuits for signal processing and control of autonomous robots.

Concurrent Ternary Galois-based Computation using Nano-apex Multiplexing Nibs of Regular Three-dimensional Networks, Part III: Layout Congestion-free Effectuation

Novel layout realizations for congestion-free three-dimensional lattice networks using the corresponding carbon-based field emission controlled switching is introduced in this article. The developed nano-based implementations are performed in three dimensions to perform the required concurrent computations for which two-dimensional implementations are a special case. The introduced realizations for congestion-free concurrent computations utilize the field-emission controlled switching devices that were presented in the first and second parts of the article for the solution of synthesis congestion and by utilizing field-emission from carbon nanotubes and nanotips. Since the concept of symmetry indices has been related to regular logic design, a more general method called Iterative Symmetry Indices Decomposition that produces regular three-dimensional lattice networks via carbon field-emission multiplexing is presented, where one obtains multi-stage decompositions whenever volume-specific layout constraints have to be satisfied. The introduced congestion-free nano-based lattice computations form new and important paths in regular lattice realizations, where applications include low-power IC design for the control of autonomous robots and for signal processing implementations.

Concurrent Ternary Galois-based Computation using Nano-apex Multiplexing Nibs of Regular Three-dimensional Networks, Part I: Basics

New implementations within concurrent processing using three-dimensional lattice networks via nano carbon-based field emission controlled-switching is introduced in this article. The introduced nano-based three-dimensional networks utilize recent findings in nano-apex field emission to implement the concurrent functionality of lattice networks. The concurrent implementation of ternary Galois functions using nano threedimensional lattice networks is performed by using carbon field-emission switching devices via nano-apex carbon fibers and nanotubes. The presented work in this part of the article presents important basic background and fundamentals with regards to lattice computing and carbon field-emission that will be utilized within the follow-up works in the second and third parts of the article. The introduced nano-based three-dimensional lattice implementations form new and important directions within three-dimensional design in nanotechnologies that require optimal specifications of high regularity, predictable timing, high testability, fault localization, self-repair, minimum size, and minimum power consumption.