Planar clock routing for high performance chip and package co-design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.502193 ◽

1996 ◽

Vol 4 (2) ◽

pp. 210-226 ◽

Author(s):

Qing Zhu ◽

Wayne Wei-Ming Dai

Keyword(s):

High Performance ◽

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Online clock routing in Xilinx FPGAs for high-performance and reliability

2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) ◽

10.1109/ahs.2012.6268634 ◽

2012 ◽

Author(s):

Xabier Iturbe ◽

Khaled Benkrid ◽

Raul Torrego ◽

Ali Ebrahim ◽

Tughrul Arslan

Keyword(s):

High Performance ◽

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Postgrid Clock Routing for High Performance Microprocessor Designs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2011.2170688 ◽

2012 ◽

Vol 31 (2) ◽

pp. 255-259

Author(s):

Haitong Tian ◽

Wai-Chung Tang ◽

Evangeline F. Y. Young ◽

C. N. Sze

Keyword(s):

High Performance ◽

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Clock routing for high-performance ICs

27th ACM/IEEE Design Automation Conference ◽

10.1145/123186.123406 ◽

1990 ◽

Author(s):

Michael A. B. Jackson ◽

Arvind Srinivasan ◽

E. S. Kuh

Keyword(s):

High Performance ◽

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Grid-to-ports clock routing for high performance microprocessor designs

Proceedings of the 2011 international symposium on Physical design - ISPD '11 ◽

10.1145/1960397.1960406 ◽

2011 ◽

Author(s):

Haitong Tian ◽

Wai-Chung Tang ◽

Evangeline F.Y. Young ◽

C.N. Sze

Keyword(s):

High Performance ◽

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Zero skew clock routing algorithm for high performance ASIC systems

Sixth Annual IEEE International ASIC Conference and Exhibit ◽

10.1109/asic.1993.410812 ◽

2002 ◽

Author(s):

W. Khan ◽

N. Sherwani

Keyword(s):

High Performance ◽

Routing Algorithm ◽

Clock Routing ◽

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An hierarchical approach to clock routing in high performance systems

Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94 ◽

10.1109/iscas.1994.408839 ◽

2002 ◽

Author(s):

W. Khan ◽

S. Madhwapathy ◽

N. Sherwani

Keyword(s):

High Performance ◽

Hierarchical Approach ◽

High Performance Systems ◽

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Matching-based methods for high-performance clock routing

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.238608 ◽

1993 ◽

Vol 12 (8) ◽

pp. 1157-1169 ◽

Author(s):

J. Cong ◽

A.B. Kahng ◽

G. Robins

Keyword(s):

High Performance ◽

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High-performance clock routing based on recursive geometric matching

Proceedings of the 28th conference on ACM/IEEE design automation conference - DAC '91 ◽

10.1145/127601.127688 ◽

1991 ◽

Author(s):

Andrew Kahng ◽

Jason Cong ◽

Gabriel Robins

Keyword(s):

High Performance ◽

Geometric Matching ◽

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Skew optimization by combining tree-based and graph-based techniques for high performance clock routing

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) ◽

10.1109/icvc.1999.820947 ◽

2003 ◽

Author(s):

Kwang-Ki Ryoo ◽

Jong-Wha Chong ◽

Hyunchul Shin

Keyword(s):

High Performance ◽

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High performance clock routing in X-architecture

2006 IEEE International Conference on Acoustics Speed and Signal Processing Proceedings ◽

10.1109/iscas.2006.1693026 ◽

2006 ◽

Author(s):

Weixiang Shena ◽

Yici Caia ◽

Jiang Hu ◽

Xianlong Honga ◽

Bing Lu

Keyword(s):

High Performance ◽

Clock Routing ◽

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