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27th ACM/IEEE Design Automation Conference
Latest Publications
TOTAL DOCUMENTS
163
(FIVE YEARS 0)
H-INDEX
18
(FIVE YEARS 0)
Published By IEEE
0897913639
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Latest Documents
Most Cited Documents
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PARASPICE: a parallel circuit simulator for shared-memory multiprocessors
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114890
◽
2002
◽
Cited By ~ 7
Author(s):
G.-C. Yang
Keyword(s):
Shared Memory
◽
Shared Memory Multiprocessors
◽
Circuit Simulator
◽
Parallel Circuit
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MISER: an integrated three layer gridless channel router and compacter
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114943
◽
2002
◽
Cited By ~ 4
Author(s):
R. Gidwani
◽
N.A. Sherwani
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Synthesis using path-based scheduling: algorithms and exercises
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114898
◽
2002
◽
Cited By ~ 24
Author(s):
R. Camposano
◽
R.A. Bergamaschi
Keyword(s):
Scheduling Algorithms
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A parallel pattern mixed-level fault simulator
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114946
◽
2002
◽
Cited By ~ 4
Author(s):
Tyh-Song Hwang
◽
Chung Len Lee
◽
Wen Zen Shen
◽
Ching Ping Wu
Keyword(s):
Parallel Pattern
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EST: the new frontier in automatic test-pattern generation
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114937
◽
2002
◽
Cited By ~ 16
Author(s):
J. Giraldi
◽
M.L. Bushnell
Keyword(s):
Test Pattern
◽
Pattern Generation
◽
Test Pattern Generation
◽
Automatic Test Pattern Generation
◽
Automatic Test
◽
New Frontier
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Is redundancy necessary to reduce delay?
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114859
◽
2002
◽
Cited By ~ 7
Author(s):
K. Keutzer
◽
S. Malik
◽
A. Saldanha
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A new simultaneous partitioning and chip placement approach based on simulated annealing
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114825
◽
2002
◽
Cited By ~ 2
Author(s):
A. Chatterjee
◽
R. Hartley
Keyword(s):
Simulated Annealing
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PHIGURE: a parallel hierarchical global router
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114934
◽
2002
◽
Cited By ~ 16
Author(s):
R.J. Brouwer
◽
P. Banerjee
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A depth-decreasing heuristic for combinational logic; or how to convert a ripple-carry adder into a carry-lookahead adder or anything in-between
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114883
◽
2002
◽
Cited By ~ 17
Author(s):
J.P. Fishburn
Keyword(s):
Combinational Logic
◽
Ripple Carry Adder
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High-level synthesis: technology transfer to industry
27th ACM/IEEE Design Automation Conference
◽
10.1109/dac.1990.114916
◽
2002
◽
Cited By ~ 3
Author(s):
R.C. Sarma
◽
M.D. Dooley
◽
N.C. Newman
◽
G. Hetherington
Keyword(s):
Technology Transfer
◽
High Level Synthesis
◽
High Level
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