In binary Differential Chaos Shift Keying (DCSK), the reference and information bearing chaotic wavelets are transmitted in two consecutive time slots. This TDMA approach provides two independent channels for the transmission of reference and information bearing wavelets but requires a delay component both in the modulator and demodulator circuits, furthermore, it halves the data attainable data rate. The wideband Radio Frequency (RF) delay lines at receiver are extremely difficult to implement with CMOS technology, therefore, the DCSK modulation cannot be exploited in many applications, such as ultra-wideband. To avoid the use of wideband RF delay lines at receiver, an alternative solution is proposed here where both the reference and information bearing wavelets are sent in the same time slot. The two wavelets are separated by Walsh codes instead of time delay. The new modulator and demodulator configurations are given, analytical expressions for the Bit Error Rate (BER) are derived and the derived BER expressions are verified by computer simulations over Additive White Gaussian Noise (AWGN) and multipath Rayleigh fading channels.
Two-Layer Carrier Index Modulation Scheme Based on Differential Chaos Shift Keying
