A shared virtual memory network with fast remote direct memory access and message passing

Author(s):  
Gang Shi ◽  
Mingchang Hu ◽  
Hongda Yin ◽  
Weiwu Hu ◽  
Zhimin Tang
2001 ◽  
Vol 02 (03) ◽  
pp. 345-364 ◽  
Author(s):  
DAVID RIDDOCH ◽  
STEVE POPE ◽  
DEREK ROBERTS ◽  
GLENFORD MAPP ◽  
DAVID CLARKE ◽  
...  

Existing user-level network interfaces deliver high bandwidth, low latency performance to applications, but are typically unable to support diverse styles of communication and are unsuitable for use in multiprogrammed environments. Often this is because the network abstraction is presented at too high a level, and support for synchronisation is inflexible. In this paper we present a new primitive for in-band synchronisation: the Tripwire. Tripwires provide a flexible, efficient and scalable means for synchronisation that is orthogonal to data transfer. We describe the implementation of a non-coherent distributed shared memory network interface, with Tripwires for synchronisation. This interface provides a low-level communications model with gigabit class bandwidth and very low overhead and latency. We show how it supports a variety of communication styles, including remote procedure call, message passing and streaming.


2014 ◽  
Vol 22 (2) ◽  
pp. 75-91 ◽  
Author(s):  
Robert Gerstenberger ◽  
Maciej Besta ◽  
Torsten Hoefler

Modern interconnects offer remote direct memory access (RDMA) features. Yet, most applications rely on explicit message passing for communications albeit their unwanted overheads. The MPI-3.0 standard defines a programming interface for exploiting RDMA networks directly, however, it's scalability and practicability has to be demonstrated in practice. In this work, we develop scalable bufferless protocols that implement the MPI-3.0 specification. Our protocols support scaling to millions of cores with negligible memory consumption while providing highest performance and minimal overheads. To arm programmers, we provide a spectrum of performance models for all critical functions and demonstrate the usability of our library and models with several application studies with up to half a million processes. We show that our design is comparable to, or better than UPC and Fortran Coarrays in terms of latency, bandwidth and message rate. We also demonstrate application performance improvements with comparable programming complexity.


2014 ◽  
Author(s):  
H. Shah ◽  
F. Marti ◽  
W. Noureddine ◽  
A. Eiriksson ◽  
R. Sharp

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