Defect-Tolerant Gate Macro Mapping & Placement in Clock-Free Nanowire Crossbar Architecture

22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007) ◽

10.1109/dft.2007.62 ◽

2007 ◽

Author(s):

Ravi Bonam ◽

Yong-Bin Kim ◽

Minsu Choi

Keyword(s):

Crossbar Architecture

Download Full-text

Reliable logic design with defective nano-crossbar architecture

2016 IEEE Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) ◽

10.1109/discover.2016.7806231 ◽

2016 ◽

Author(s):

Malay Kule ◽

Hafizur Rahaman ◽

Bhargab B. Bhattacharya

Keyword(s):

Logic Design ◽

Crossbar Architecture

Download Full-text

A Diagonally Weighted Binary Memristor Crossbar Architecture Based on Multilayer Neural Network for Better Accuracy Rate in Speech Recognition Application

Advances in Electrical and Computer Engineering ◽

10.4316/aece.2019.02010 ◽

2019 ◽

Vol 19 (2) ◽

pp. 75-82

Author(s):

M.-H. VO

Keyword(s):

Neural Network ◽

Speech Recognition ◽

Accuracy Rate ◽

Crossbar Architecture ◽

Memristor Crossbar

Download Full-text

Three-Dimensional Memristor-Based Crossbar Architecture for Capsule Network Implementation

2018 Eighth International Conference on Information Science and Technology (ICIST) ◽

10.1109/icist.2018.8426119 ◽

2018 ◽

Author(s):

Yi Huang ◽

Rui Hu ◽

Zhigang Zeng

Keyword(s):

Three Dimensional ◽

Crossbar Architecture

Download Full-text

Comparison of Two Memristor Based Neural Network Learning Schemes for Crossbar Architecture

Advances in Computational Intelligence - Lecture Notes in Computer Science ◽

10.1007/978-3-642-38679-4_49 ◽

2013 ◽

pp. 492-499 ◽

Author(s):

Janusz A. Starzyk ◽

Basawaraj

Keyword(s):

Neural Network ◽

Neural Network Learning ◽

Network Learning ◽

Crossbar Architecture ◽

Learning Schemes

Download Full-text

A one Zener diode, one memristor crossbar architecture for a write-time-based PUF

2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2015.7282123 ◽

2015 ◽

Author(s):

Timothy Potteiger ◽

William H. Robinson

Keyword(s):

Zener Diode ◽

Crossbar Architecture ◽

Memristor Crossbar

Download Full-text

Memristor lookup table (MLUT)-based asynchronous nanowire crossbar architecture

10th IEEE International Conference on Nanotechnology ◽

10.1109/nano.2010.5697869 ◽

2010 ◽

Author(s):

Jun Wu ◽

Minsu Choi

Keyword(s):

Lookup Table ◽

Crossbar Architecture

Download Full-text

Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells

Journal of Parallel and Distributed Computing ◽

10.1016/j.jpdc.2013.08.004 ◽

2014 ◽

Vol 74 (6) ◽

pp. 2484-2496 ◽

Author(s):

W.S. Zhao ◽

J.M. Portal ◽

W. Kang ◽

M. Moreau ◽

Y. Zhang ◽

...

Keyword(s):

Resistive Switching ◽

Memory Cells ◽

Non Volatile Memory ◽

Volatile Memory ◽

Crossbar Architecture

Download Full-text

Hybrid crossbar architecture for a memristor based cache

Microelectronics Journal ◽

10.1016/j.mejo.2015.08.015 ◽

2015 ◽

Vol 46 (11) ◽

pp. 1020-1032 ◽

Author(s):

Chris Yakopcic ◽

Raqibul Hasan ◽

Tarek M. Taha

Keyword(s):

Crossbar Architecture

Download Full-text

The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches

10.1109/mm.2014.56 ◽

2015 ◽

Vol 35 (6) ◽

pp. 38-47 ◽

Author(s):

Giorgos Passas ◽

Manolis Katevenis ◽

Dionisios Pnevmatikatos

Keyword(s):

Input Output ◽

Crossbar Architecture ◽

Download Full-text

Crossbar Architecture for Memristor Based Memory Simulation

10.26799/cp-nanotechfrance2019/10 ◽

2019 ◽

Author(s):

Seshan Srinivasan ◽

Meenal Negi ◽

Lili He ◽

Keyword(s):

Crossbar Architecture

Download Full-text